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Hardware clock synchronization circuit for two out of three security systems

A hardware clock and synchronization circuit technology, applied in the direction of generating/distributing signals, etc., can solve problems such as poor synchronization effect, achieve fast synchronization speed, avoid common mode faults, and have strong anti-interference effects

Active Publication Date: 2015-10-14
CASCO SIGNAL
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The software implementation is relatively flexible, with good applicability and compatibility, but due to the inherent and inevitable large delay in the communication between various systems, the synchronization effect is not good

Method used

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  • Hardware clock synchronization circuit for two out of three security systems
  • Hardware clock synchronization circuit for two out of three security systems
  • Hardware clock synchronization circuit for two out of three security systems

Examples

Experimental program
Comparison scheme
Effect test

Embodiment

[0028] Such as figure 1 , figure 2 As shown, the two-out-of-three safety system applicable to the present invention has three relatively independent channels A, B and C, and the circuit structure of each channel is exactly the same. Each channel circuit includes a crystal oscillator circuit and a hardware clock synchronization circuit, and the hardware clock synchronization circuit includes a clock unit 5, a core operation unit 2, a feedback compensation unit 3, a drive control unit 4 and a supervision unit 1; the supervision unit 1 and the core The operation unit 2 is connected, the core operation unit 2 is connected with the feedback compensation unit 3 and the drive control unit 4, the drive control unit 4 is connected with the feedback compensation unit 3, and the feedback compensation unit 3 is connected with the clock unit 5 ; The generated clock synchronization signals are output to the other two channels for comparison and adjustment. A 1MHz crystal oscillator provi...

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PUM

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Abstract

The invention relates to a hardware clock synchronous circuit for a two-out-of three safety system. The two-out-of three safety system is provided with three independent channel circuits, each channel circuit comprises a crystal oscillator circuit and a hardware clock synchronous circuit, and each hardware clock synchronous circuit comprises a clock unit, a core computing unit, a feedback compensation unit, a driving control unit and a supervising unit. The supervising units are connected with the core computing units; the core computing units are connected with the feedback compensation units and the driving control units; the driving control units are connected with the feedback compensation units; and the feedback compensation units are connected with the clock units. Compared with the prior art, the hardware clock synchronous circuit has the advantages of being low in cost, fast in synchronous speed, high in accuracy, strong in interference resistance and the like.

Description

technical field [0001] The invention relates to a clock synchronization circuit, in particular to a hardware clock synchronization circuit used in a two-out-of-three security system. Background technique [0002] High-safety and high-reliability systems often use two out of three platforms as system processors, especially in the field of railway signaling and rail transit, where some equipment may need to work continuously for several years or even decades, and the system safety integrity level needs to reach SIL4, these requirements put forward many strict requirements for hardware construction. In building the 3 out of 2 platform, a safe and reliable clock synchronization design must be provided to ensure the correct operation of the system. In the 3 out of 2 platform, the three channels work independently , each other needs to perform accurate clock synchronization, otherwise the same input value cannot be obtained, and the consistent operation sequence cannot be obtained...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/12
Inventor 潘雷房增华宋志坚徐俊耿进龙崔丹王澜孙军峰唐俊董高云
Owner CASCO SIGNAL
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