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Interconnected chip and data transmission method between chips

A data transmission method and chip-to-chip technology, applied in the direction of electrical digital data processing, instruments, etc., can solve the problems of complex and cumbersome circuits, connection or communication speed limitations, etc., and achieve the effect of simple connection, rapid connection and convenient use

Inactive Publication Date: 2013-06-05
AVIC NO 631 RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] In the process of large-scale system design, it is often not possible to realize all functions by one chip, and two or more chips need to complete the circuit functions together, which inevitably involves the problem of how to realize the interconnection between chips. When interconnecting, the circuit is complex and cumbersome, and the speed of connection or communication is greatly limited

Method used

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  • Interconnected chip and data transmission method between chips

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Experimental program
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Effect test

Embodiment Construction

[0028] see figure 1 , the interconnectable chip provided by the present invention includes the following parts:

[0029] 1. The sending state machine in chip A. This module is responsible for framing the data that needs to be sent to chip B. The data format after framing is:

[0030] start of frame delimiter

[0031] In the above data format, "data" is pure data to be sent to chip B, wherein the frame start delimiter indicates the start of the frame, and the data length indicates the number of "data" bytes or words to be sent, Units can be defined differently in different systems; the end-of-frame delimiter indicates the end of a frame. The source address indicates the source ID of this data. The destination address indicates the destination ID to which this data is sent. The start-of-frame delimiter and end-of-frame delimiter can be specially encoded to maintain a certain reliability when transmitted in the serial transceiver. Source address and destination addr...

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PUM

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Abstract

The invention relates to an interconnected chip which can be connected with other chips and a data transmission method between chips. The interconnected chip comprises a sending state machine, a serial transceiver and a receiving state machine, wherein the sending state machine conducts framing for data which needs sending, the serial transceiver conducts serialization and transmitting for data after framing, and the receiving state machine receives data and conducts data detaching and analysis. The invention provides a circuit structure of an interconnection protocol, the circuit structure of the interconnection protocol passes through a serial link between the chips and is arranged between two chips or among multiple chips, and the circuit structure achieves a circuit design requirement for conducting interconnection among the chips.

Description

technical field [0001] The invention belongs to the field of computer hardware and relates to a chip, in particular to an interconnectable chip which can be connected with other chips and a data transmission method between the chips. Background technique [0002] In the process of large-scale system design, it is often not possible to realize all functions by one chip, and two or more chips need to complete the circuit functions together, which inevitably involves the problem of how to realize the interconnection between chips. When interconnecting, the circuit is complex and cumbersome, and the speed of connection or communication is greatly limited. Contents of the invention [0003] In order to solve the above-mentioned technical problems existing in the background technology, the present invention provides a circuit structure between chips through a serial link, an interconnection protocol between two or more chips, and realizes the interconnection between chips circu...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/38
Inventor 田泽蔡叶芳李攀淮治华刘娟
Owner AVIC NO 631 RES INST
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