Adaptive side-lobe cancellation weight value method based on FPGA (field programmable gate array)

Abstract

The invention relates to an adaptive side-lobe cancellation weight value method based on FPGA. The adaptive side-lobe cancellation weight value method based on FPGA utilizes an FPGA hardware platform to accelerate processing and shorten processing delay. In the algorithm, an autocorrelation matrix of auxiliary beams and a cross-correlation matrix of the auxiliary beams and target beams are estimated according to disturbance data, auxiliary beam weight values and target beam weight values, and operations such as a matrix inversion, matrix multiplication are performed in an FPGA device to obtain the adaptive side-lobe cancellation weight value. The delay of the whole processing is determined by matrix estimation and matrix manipulation. The calculation amount of the matrix estimation is relatively small, the processing delay is less, and the operating time is affected by the number of sampling points. The calculation amount of the matrix manipulation is relatively large and is mainly affected by the number of the auxiliary beams; for n auxiliary beams (n<60), the processing delay of the portion is about 60N+N (N-1) clock periods.

Description

Technical field [0001] The invention belongs to the technical field of array signal processing, and specifically relates to an FPGA-based method for self-adapting sidelobe cancellation weights. Background technique [0002] Adaptive sidelobe cancellation technology has been used in array signal processors. The key issue of adaptive sidelobe cancellation technology is the calculation of adaptive sidelobe cancellation weights. At present, most signal processors use DSP devices to complete the calculation of adaptive weights. However, as the number of elements increases and the speed of weight update increases, the amount of adaptive weight calculation increases significantly, which will lead to an increase in processing delay. Summary of the invention [0003] Technical problem to be solved [0004] In order to avoid the shortcomings of the prior art, the present invention proposes an FPGA-based method for adaptive sidelobe cancellation weights, which uses FPGA hardware platform to...

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Problems solved by technology

However, with the increase of the number of array elements and the improvement of the weight update speed, the amount of adaptive weight calculation increases significantly, which will cause the processing delay to increase accordingly.

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