A method and device for automatically generating an image processing module verification platform

Abstract

The present invention provides a method and device for automatically generating a verification platform for an image processing module. By obtaining a register description file, the register is a register included in the image processing module, and the register description file includes a register transmission level description, and a register Correspondence with the parameters required for building the graphics processing module verification platform; based on the register description file, generate the code required to build the image processing module verification platform; build the image processing module based on the required code for the image processing module verification platform Module Verification Platform. Therefore, the image processing module verification platform can be automatically generated, which saves the verification platform construction time, reduces the verification platform construction errors, and improves the verification platform construction efficiency.

Description

technical field [0001] The invention relates to the technical field of chip fabrication, and in particular to a method and device for automatically generating an image processing module verification platform. Background technique [0002] The current image processing chip contains a large number of hardware design modules of image processing algorithms. These modules contain thousands of register parameters. It is necessary to manually write the register parameter definition and implementation files, and connect the register parameters to the algorithm sub-module design port. [0003] In the actual operation process, it is very tedious and error-prone to determine the corresponding relationship between each register parameter and the parameters in the algorithm reference model. This process has to be repeated every time the parameters are changed, consuming a lot of time and effort. [0004] Moreover, when the top-level algorithm modules have not been integrated, it is usua...

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Problems solved by technology

[0003] In actual operation, it is very tedious and error-prone to determine the correspondence between each register parameter and the parameters in the algorithm reference model

This process has to be repeated every time the parameters are changed, consuming a lot of time and effort

[0004] Moreover, when the top-level algorithm modules have not been integrated, it is usually necessary to manually build a verification environment for each module separately, which is likely to cause inconsistent verification environments and is inconvenient to reuse in top-level module or system-level verification.

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