A/D data collection port circuit

Abstract

The invention relates to an A / D data collection port circuit. In a field programmable gate array (FPGA) system, a control port logic of an external A / D data collection circuit is realized. An NIOS processor is used as a main controller. A data conversion circuit is controlled through programming. Due to the fact that working frequency of the NIOS processor is much higher than external equipment, great waste of central processing unit (CPU) resources is caused. The A / D data collection port circuit comprises a data processing circuit, a data interface, a data acquisition control logic circuit, and an A / D conversion circuit, wherein the data processing circuit is connected with the data acquisition control logic circuit through the data interface, and the A / D conversion circuit is connected with a data processing circuit and is connected with an AVALON bus through the data interface. The A / D data collection port circuit can collect data ceaselessly without data loss. A CPU can initiatively read the data, and also can passively acquire data when the data processing unit detects external abnormal signals. The operation of the CPU reading the data is very easy, and only few CPU resources are occupied at operation time.

Description

technical field [0001] The invention relates to an A / D data acquisition interface circuit. Background technique [0002] In the FPGA system, to realize the control interface logic of the external A / D data acquisition circuit, because its logic function is not very complicated, it can adopt a self-defined method, using the NIOS processor as a main controller, by writing a program to Controlling the data conversion circuit, because the working frequency of the NIOS processor is much higher than that of the external equipment, it causes a great waste of CPU resources. Contents of the invention [0003] The technical problem solved by the invention is to provide an A / D data acquisition interface circuit which is realized by an external circuit, easily meets requirements, can save resources, and improves system performance. [0004] For solving above-mentioned technical problem, the technical scheme that the present invention takes: [0005] An A / D data acquisition interface...

AI Technical Summary

Problems solved by technology

[0002] In the FPGA system, the control interface logic for the external A / D data acquisition circuit is implemented. Since its logic function is not very complicated, it can be customized. The NIOS processor is used as a main controller, and the data conversion circuit is controlled by writing a program. Since the operating frequency of the NIOS processor is much higher than that of the external equipment, it causes a great waste of CPU resources.

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