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Method for manufacturing semiconductor device

A manufacturing method, semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor device, final product manufacturing, etc., to achieve the effect of improving productivity

Inactive Publication Date: 2013-07-17
SHARP KK
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In Patent Document 3, it is not particularly described that after the formation of the amorphous silicon layer, the method for forming n + The specific method of a-Si layer

Method used

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  • Method for manufacturing semiconductor device
  • Method for manufacturing semiconductor device
  • Method for manufacturing semiconductor device

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Embodiment Construction

[0036] Hereinafter, various embodiments based on the present invention will be described with reference to the drawings. In each of the following embodiments, when referring to the number of objects, the amount, and the like, the scope of the present invention is not limited by the number of objects, the amount, and the like unless otherwise specified. In each embodiment described below, the same reference numerals are attached to the same members or corresponding members, and repeated description may not be repeated.

[0037] [Embodiment 1]

[0038] This embodiment will be described based on a method of manufacturing a photoelectric conversion device having a pin junction as an example of a method of manufacturing a semiconductor device. In the method of manufacturing a photoelectric conversion device according to the present embodiment, the conductive type layer (n-type layer) is deposited so as to cover the semiconductor layer (i-type layer) using a plasma CVD method. In ...

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Abstract

A semiconductor layer (4, 304) is formed on a predetermined layer by introducing a gas for forming a semiconductor layer into a reaction chamber (70), and causing the gas for forming a semiconductor layer to form a plasma discharge. A first electroconductive layer (5, 305) of a first conductivity type is formed so as to cover the semiconductor layer. The layer is formed by introducing an impurity gas into the reaction chamber in addition to the gas for forming a semiconductor layer, and by causing a plasma discharge to be formed by a gas for forming the first electroconductive layer. The gas for forming the first electroconductive layer contains the gas for forming a semiconductor layer and the impurity gas. In the step of forming the first electroconductive layer, the values that set the composition of the gases supplied to the reaction chamber are altered from the composition of the gas for forming the7 semiconductor layer to the composition of the gas for forming the first electroconductive layer in a state in which the pressure in the reaction chamber is not reduced to an ultimate vacuum even after the end of the plasma discharge process for forming the semiconductor layer. The productivity of the method for manufacturing a semiconductor device can be improved.

Description

technical field [0001] The present invention relates to a method of manufacturing a semiconductor device. Background technique [0002] A method of manufacturing a photoelectric conversion device is disclosed in JP-A-04-266067 (Patent Document 1) and JP-A-2009-004702 (Patent Document 2). This method is an example of a method of manufacturing a semiconductor device in which a conductive type layer (n-type layer or p-type layer) is deposited so as to cover a semiconductor layer (i-type layer). In the methods described in Patent Documents 1 and 2, after the semiconductor layer is deposited, high vacuum exhaust is performed in the reaction chamber so that the degree of vacuum in the reaction chamber becomes 10. -6 Below Torr or around 0.001Pa. After that, a predetermined impurity gas is introduced into the reaction chamber, and a conductivity type layer is deposited on the semiconductor layer. [0003] Japanese Unexamined Patent Publication No. 2007-059560 (Patent Document 3)...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L31/04C23C16/50H01L21/205H01L21/336H01L29/786
CPCH01L21/0245H01L29/78696H01L21/02532H01L31/202H01L31/076C23C16/24C23C16/515H01L21/02576H01L29/66765H01L21/0262H01L29/4908Y02E10/548H01L21/02579Y02P70/50
Inventor 谷村泰树奈须野善之岛田久浬代
Owner SHARP KK