Early-warning circuit for failure of hot carrier injection
A hot carrier and circuit technology is applied in the field of hot carrier injection failure early warning circuits, which can solve the problems of inconvenient popularization and application, complex circuit structure, and difficulty in guaranteeing reliability.
Active Publication Date: 2013-07-24
FIFTH ELECTRONICS RES INST OF MINIST OF IND & INFORMATION TECH
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Problems solved by technology
However, the traditional early warning technology uses a comparison circuit with a "threshold threshold" characteristic, and the circuit structure is relatively complex, so its reliability will be difficult to guarantee, and it is not easy to popularize and apply
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[0016] The present invention will be described in further detail below in conjunction with the embodiments and accompanying drawings, but the embodiments of the present invention are not limited thereto.
[0017] Such as figure 1 As shown, it is a schematic diagram of the circuit structure of the early warning circuit for hot carrier injection failure in an embodiment of the present invention, including: a stress generation module 100, a differential test module 200, an offset voltage elimination module 300, a non-overlapping clock generation module 400, Comparison module 500, output module 600;
[0018] The output end of the stress generation module 100 is connected to the input end of the differential test module 200, the output end of the differential test module 200 is connected to the input end of the comparison module 500 through the offset voltage elimination module 300, and the output end of the comparison module 500 is connected to the input end of the output module 6...
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The invention discloses an early-warning circuit for failure of hot carrier injection, comprising a stress generation module, a differential testing module, an offset voltage elimination module, a non-overlapping clock generation module, a comparison module and an output module, wherein the output end of the stress generation module is connected with the input end of the differential testing module; the output end of the differential testing module is connected with the input end of the comparison module by the offset voltage elimination module; the output end of the comparison module is connected with the input end of the output module; and the output end of the non-overlapping clock generation module is respectively connected with the input end of the stress generation module, the other input end of the differential testing module and the other input end of the offset voltage elimination module. The early-warning circuit disclosed by the invention has the advantages that an alarming signal can be accurately outputted when the hot-carrier injection effect occurs to a certain extent, the reliability is higher, the structure is simple and the popularization and the application are easy.
Description
technical field [0001] The invention relates to an early warning circuit, in particular to a hot carrier injection failure early warning circuit. Background technique [0002] With the development of ultra-large-scale integrated circuit manufacturing technology in the direction of deep submicron, the size of MOS devices has been reduced proportionally, but the operating voltage has not been reduced proportionally, which means that the lateral and vertical electric fields in the channel region have increased significantly. After the carriers in the channel gain enough energy in the high electric field, the probability of forming hot carriers is greatly increased. These high-energy carriers can jump over the interface barrier in the channel of the MOS device, inject the gate oxide layer, generate an interface state at the Si-SiO2 interface or be trapped by the charge trap in the gate oxide layer, and then lead to the threshold voltage, transconductance and The leakage current...
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IPC IPC(8): G01R31/26
Inventor 陈义强王彬恩云飞陆裕东黄云
Owner FIFTH ELECTRONICS RES INST OF MINIST OF IND & INFORMATION TECH