Thin film transistor (TFT) array substrate, manufacturing method and display device of TFT array substrate
An array substrate and signal line technology, which is applied in the field of display manufacturing, can solve the problem of excessive use of mask plates, etc., and achieve the effect of reducing use
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Embodiment 1
[0039] In the method for manufacturing a TFT array substrate provided in Embodiment 1 of the present invention, firstly, a gate electrode 1 and a gate line 2 are formed on the substrate, and a gate insulating layer 3 is formed over the gate line 2 and the gate electrode 1; Deposit a semiconductor layer and a metal layer, and carry out a patterning process on the semiconductor layer and the metal layer using the same mask to form an active layer 4, a source electrode 51, and a drain electrode 52 above the gate electrode 1, and to form an active layer 4 above the gate electrode 1 and a drain electrode 52 above the gate line 2 Cover the signal line 5 of the residual semiconductor layer 401; then perform a via process on the signal line 5, the residual semiconductor layer 401 located below the signal line, and the gate insulating layer 3 to form a via hole 11, and expose the signal line on the side wall of the via hole 11 The side section of the line 5 and the side section of the s...
Embodiment 2
[0042] Embodiment 2 of the present invention will describe the manufacturing method of the above-mentioned TFT array substrate in Embodiment 1 in detail in combination with practical applications. Of course, it is not limited thereto. The manufacturing process of the TFT array substrate in Embodiment 2 of the present invention is as follows image 3 shown, including:
[0043] Step S301 : using a first mask to perform a first patterning process to form gate electrodes 1 and gate lines 2 .
[0044] Specifically, in the embodiment of the present invention, after the gate metal thin film is deposited on the substrate by magnetron sputtering or thermal evaporation, the first patterning process can be performed using the first mask to form the gate electrode 1 and the gate line 2, Such as Figure 4A shown.
[0045] Step S302: On the basis of the patterning process completed in step S301, a gate insulating layer, a semiconductor layer and a metal layer are sequentially deposited. ...
Embodiment 3
[0063] Embodiment 3 of the present invention also provides a TFT array substrate manufactured by applying the manufacturing method of the above embodiment, the TFT array substrate includes: gate lines 2 and gate electrodes 1 formed on the substrate; covering gate lines 2 and gate electrodes 1 The gate insulating layer 3; the active layer 4, the source electrode 51 and the drain electrode 52 formed on the gate insulating layer 3 and positioned above the gate electrode 2; the residual semiconductor layer 401 formed on the gate insulating layer 3 and positioned above the gate line , and the signal line 5 covering the residual semiconductor layer 401; and the signal line 5, the semiconductor layer 401, and the gate insulating layer 3 also have a side wall exposing the side section of the signal line 5 and a side section of the semiconductor layer 401, and the bottom surface exposes the gate line 2 The via hole 11 on the surface; the overlapping conductive layer 12 for electrically ...
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