Rotate left-based quasi-cyclic (QC) matrix serial multiplier in deep space communication

A quasi-circular matrix, deep space communication technology, applied in the field of channel coding, can solve the problems of high cost, large registers, and high circuit power consumption, and achieve the effects of simple structure, reduced registers, and reduced power consumption

Inactive Publication Date: 2013-08-07
RONGCHENG DINGTONG ELECTRONICS INFORMATION SCI & TECH CO LTD
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Problems solved by technology

One of the disadvantages of this scheme is that a large number of registers are req...

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  • Rotate left-based quasi-cyclic (QC) matrix serial multiplier in deep space communication
  • Rotate left-based quasi-cyclic (QC) matrix serial multiplier in deep space communication
  • Rotate left-based quasi-cyclic (QC) matrix serial multiplier in deep space communication

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Embodiment Construction

[0030] The preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, so as to define the protection scope of the present invention more clearly.

[0031] Since the generator polynomial f of the circulant matrix i,j Rotating right n bits is equivalent to rotating it left b-n bits, ie Then equation (8) can be rewritten as

[0032] m i F i , j = e i × b f i , j 1 ( b ) + e i...

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Abstract

The invention provides a rotate left-based quasi-cyclic (QC) matrix serial multiplier in deep space communication, which is used for realizing the multiplication of a vector m and a quasi-cyclic matrix F in triangle coding under standard multi-code class QC-LDPC approximate in the deep space communication of consultative committee for space data systems (CCSDS). The multiplier comprises 4 generating polynomial lookup tables which prestore cyclic matrix generating polynomials of all code class matrixes F, 4 2048-bit binary multipliers which perform scalar multiplication on the data bit of the vector m and the generating polynomials, 4 2048-bit binary adders which perform modulo 2 addition on products and contents of shift registers, and 4 2048-bit shift registers which store the sums which are rotated left for one bit. The quasi-cyclic matrix serial multiplier provided by the invention is compatible with all code classes, and has the advantages of few registers, simple structure, low power consumption, low cost and the like.

Description

technical field [0001] The invention relates to the field of channel coding, in particular to a quasi-circular matrix serial multiplier in CCSDS deep space communication standard multi-code QC-LDPC approximate lower triangular coding. Background technique [0002] Low-Density Parity-Check (LDPC) code is one of the efficient channel coding techniques, and QC-LDPC (Quasic-LDPC, QC-LDPC) code is a special LDPC code. Both the generation matrix G and the check matrix H of the QC-LDPC code are arrays composed of circulant matrices, which have the characteristics of a segmented cycle, so they are called QC-LDPC codes. The first row of the circulant matrix is ​​the result of the cyclic right shift of the last row by 1 bit, and the remaining rows are the result of the cyclic right shift of the previous row by 1 bit. Therefore, the circulant matrix is ​​completely characterized by its first row. Usually, the first row of a circulant matrix is ​​called its generator polynomial. [00...

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Application Information

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IPC IPC(8): H03M13/11
Inventor 张鹏刘志文张燕
Owner RONGCHENG DINGTONG ELECTRONICS INFORMATION SCI & TECH CO LTD
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