Metal gate semiconductor device

Abstract

Provided is a method and device that includes providing for a plurality of differently configured gate structures on a substrate. For example, a first gate structure associated with a transistor of a first type and including a first dielectric layer and a first metal layer; a second gate structure associated with a transistor of a second type and including a second dielectric layer, a second metal layer, a polysilicon layer, the second dielectric layer and the first metal layer; and a dummy gate structure including the first dielectric layer and the first metal layer. The invention provides a metal gate semiconductor device.

Description

technical field [0001] The present invention generally relates to the field of semiconductor technology, and more particularly, to a semiconductor device and a manufacturing method thereof. Background technique [0002] Semiconductor integrated circuit (IC) processes have experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs, where each generation has smaller and more complex circuits than the previous generation. During IC development, functional density (ie, the number of interconnected devices per unit chip area) typically increases, while geometry size (ie, the smallest component (or line) that can be created using a fabrication process) decreases. This scaling down process generally provides advantages by increasing production efficiency and reducing associated costs. This scaling down also increases the complexity of handling and manufacturing ICs, and similar developments in IC processing and manufacturing...

AI Technical Summary

Problems solved by technology

However, implementing such components and processes in CMOS fabrication has difficulties

These difficulties increase for devices with different types of gate structures on a single substrate

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