A terminal sleep cycle control method and device
A sleep cycle and control method technology, applied in the field of mobile communications, can solve problems such as loss of subframe boundary and frame number synchronization information, shortening terminal sleep time, unfavorable terminal low power consumption, etc., to ensure timing accuracy and reduce power consumption , the effect of prolonging the sleep cycle
Inactive Publication Date: 2016-12-07
이노피데이인코포레이티드 +1
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Problems solved by technology
[0005] In sleep mode, a low-frequency clock (32.768KHZ) is used instead of a high-precision high-frequency clock. When the UE starts to transmit data when it wakes up, due to the inaccurate time, the synchronization information such as the subframe boundary and frame number of the transmitted data will be lost. lost, requiring a resynchronization
[0006] The re-synchronization process requires a high-frequency clock and requires the UE to be in the working mode. Therefore, the sleep mode needs to be terminated in advance. Therefore, the re-synchronization process actually shortens the sleep time of the terminal, because the re-synchronization time can reach milliseconds , for a short DRX sleep cycle, the system cannot even enter sleep, which is not conducive to the low power consumption of the terminal
Method used
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Embodiment 1
[0088] Preferably in Embodiment 1, the first timing point is aligned with the first edge of the low-frequency clock, the first edge is after the timing starting point, the first edge of the low-frequency clock, and the high-frequency clock counts to the first edge of the low-frequency clock Edge, and then start timing by the low-frequency clock. Since the difference between the sleep cycle T0 and the timing time T1 of the low-frequency clock is not less than one cycle, the high-frequency clock can be timed accordingly to the edge of the low-frequency clock. There are many choices. Therefore, Provided in this embodiment is a method for determining the first timing point, that is, a method for determining the edge at which the low-frequency clock starts counting. The edge of the Nth edge of the low-frequency clock can be the rising or falling edge of the low-frequency clock. Step 202 can include:
[0089] Sub-step S21, calculating the sleep cycle T0 minus the difference T1 betwee...
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The invention provides a method and device for controlling a sleep cycle of a terminal. The method includes the steps that after the instruction of entering a sleep mode is received, a high-frequency clock is used for conducting timing; when the fact that timing of the high-frequency clock reaches a first time point is determined, a low-frequency clock is used for conducting timing and the terminal enters the sleep mode; when the fact that the timing of the low-frequency clock reaches a second timing point is determined, the high-frequency clock is used for conducting timing; when the fact that the timing of the high-frequency clock reaches a third timing point, the terminal is triggered to enter a working mode, and starts to conduct data interaction with a base station. The method and device can prolong the sleep cycle of the terminal and lower power consumption of the terminal.
Description
technical field [0001] The present invention relates to the technical field of mobile communication, in particular to a terminal sleep cycle control method and a terminal sleep cycle control device. Background technique [0002] LTE (Long Term Evolution, long-term evolution project) has been widely used as a fourth-generation wireless communication (3G) standard. Electronic equipment using LTE communication standards can provide users with fast and stable network services, with high reception rates, It has the characteristics of high spectrum utilization rate and simple receiver. [0003] In the LTE system, the user terminal UE must perform accurate time synchronization with the base station eNB when working, that is, keep the subframe alignment state of the transmitted data at all times. In the working mode, there is a separate timing module in the UE receiver, which uses a high-frequency clock to generate various required timings and timings. The high-frequency clock prov...
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IPC IPC(8): H04W52/02H04W76/04
CPCY02D30/70
Inventor 周卓王艳龙
Owner 이노피데이인코포레이티드