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Edge rounded field effect transistor and manufacturing method

An edge and nitride layer technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve problems such as damage to the tunneling dielectric layer

Active Publication Date: 2017-02-08
CYPRESS SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The process of programming and erasing CT-FET memory cells 210 damages the tunneling dielectric layer, resulting in a limited number of program-erase cycles that can be exhibited on flash memory IC 100

Method used

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  • Edge rounded field effect transistor and manufacturing method
  • Edge rounded field effect transistor and manufacturing method
  • Edge rounded field effect transistor and manufacturing method

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Embodiment Construction

[0014] Embodiments consistent with the present invention are described in detail below with reference to the examples illustrated in the accompanying drawings. While the present invention will be illustrated by the following examples, it will be understood that the invention is not limited to the following examples. On the contrary, the invention is intended to include within the scope of substitutions, modifications and equivalents of the present invention as defined by the appended claims. Moreover, in the following detailed description of the invention, numerous specific details are set forth to provide an understanding of the invention. However, it is understood that the invention may be practiced without these specific details. In other words, prior art methods, procedures, components and circuits have not been disclosed in detail so as not to obscure aspects of the present invention.

[0015] In this application, use of "disjunctive" is intended to include "conjunctive...

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PUM

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Abstract

Embodiments of the present invention are directly related to gate sidewall engineering of field effect transistors. This technique involves the formation of bulk dielectric regions and the nitridation of their surfaces. After nitridation of the bulk dielectric region, a gate region is formed thereon and the sidewalls of the gate region are oxidized to round gate corners and reduce the electric field at the gate corners.

Description

Background technique [0001] Data storage devices are an important part of a variety of electronic devices such as computers, smartphones, digital content players (eg, MP3 players), game consoles, control systems, and the like. Many electronic devices contain non-volatile solid-state memory devices, such as flash memory. One common type of flash memory device is the charge trapping (CT) and not (NAND) integrated circuit (IC). figure 1 An exemplary CT-NAND flash memory IC is shown. Flash memory IC 100 includes CT-NAND memory cell array 110, control circuit 120, column decoder (column decoder) 130, row decoder (row decoder) 140, input / output (I / 0) buffer 150 and the like. Addresses 170, 175 in the memory cell array 110 operate the control circuit 120, the column decoder 130, the row decoder and 140, I / O buffer 150, etc. to read and write data 160. The circuitry of the flash memory IC 100 is known in the art, and thus those aspects of the flash memory IC 100 that are not spec...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L29/78
CPCH01L29/40117H01L21/28202H01L29/518H10B43/30H01L29/4234
Inventor S·房T-S·陈
Owner CYPRESS SEMICON CORP