Etch first and then seal three-dimensional system-on-chip front-mount bump packaging structure and process method

Abstract

The invention relates to a convex point packaging structure and a technique of a horizontal chip of a firstly-etched and then-packaged three-dimensional system level. The structure comprises pads and pins, wherein first chips and second chips are arranged on front sides and rear sides of the pads; front sides of the first chips and the second chips are connected with the front sides and the rear sides of the pins through metal wires respectively; conductive columns are arranged on the front sides of the pins; the peripheral areas of the pads, the areas between the pads and the pins and among the pins, the areas of the upper parts and the lower parts of the pads and the pins and outsides of the first chips, the second chips, the metal wires and the conductive columns are packaged with a molding compound; surfaces, exposing out the molding compound, of the conductive columns are plated with an anti-oxidation layer; and metal balls are arranged at the tops of the conductive columns. According to the convex point packaging structure and the technique of the horizontal chip of the firstly-etched and then-packaged three-dimensional system level, the problem that the integration of a whole packaging function is limited due to the fact that an object cannot be embedded into a conventional metal lead frame or an organic multilayer circuit substrate is solved.

Description

technical field [0001] The invention relates to an etching-before-sealing three-dimensional system-level chip front-mount bump packaging structure and a process method. It belongs to the technical field of semiconductor packaging. Background technique [0002] Traditional four-sided leadless metal lead frame package structure such as Figure 85 As shown, the main manufacturing process is to take metal sheets for chemical etching and metal plating to make a base island for carrying chips and a metal lead frame with inner and outer pins, and then perform one-sided chip loading and wire bonding on this basis. , encapsulation and other packaging processes. [0003] The traditional organic multilayer circuit substrate packaging structure such as Figure 86 As shown, the main process is to form a multi-layer circuit board by stacking the core material of the glass fiber board by accumulating materials, opening holes between the circuit layers by laser drilling, and then plating ...

AI Technical Summary

Problems solved by technology

[0010] The purpose of the present invention is to overcome the above-mentioned shortcomings, and provide a three-dimensional system-level chip flip-chip bump packaging structure and process method after sealing first and etching later, which can solve the problem that traditional metal lead frames or multilayer circuit substrates cannot embed chips and passive components. However, the problem of limiting the integration of the entire package function and the traditional organic substrate require thinner line width and narrower line-to-line spacing

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