Eureka AIR delivers breakthrough ideas for toughest innovation challenges, trusted by R&D personnel around the world.

Automatic hardware language transformation system

An automatic conversion, hardware language technology, applied in memory systems, program control design, instruments, etc., can solve the problems of complex use environment, high cost of commercial simulation software, unsuitable performance analysis and system evaluation, etc. The effect of reliability and convenient model checking

Inactive Publication Date: 2013-12-18
XIDIAN UNIV
View PDF6 Cites 10 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, the use of commercial simulation software has become the first choice of IC design engineers, but commercial simulation software is not suitable for general applications such as performance analysis and system evaluation due to limitations such as high cost and complex use environment.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Automatic hardware language transformation system
  • Automatic hardware language transformation system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0060] The present invention will be further described below in conjunction with the accompanying drawings.

[0061] Such as figure 1 , figure 2 As shown, the present invention is a hardware language automatic conversion system, and the conversion system includes:

[0062] Lexical analysis module: there is a lexical analyzer for converting Verilog source files into tokens, including keywords, values, strings, identifiers, operators, spacers and comments in the Verilog language;

[0063] Grammatical analysis and semantic checking module: there is a grammatical analyzer for identifying the grammatical structure in the Verilog language; among them, semantic checking is performed while grammatical analysis;

[0064] Intermediate storage module: after lexical analysis, grammatical analysis, semantic inspection, and symbol processing, obtain an intermediate representation representing the Verilog source file, and store the intermediate file;

[0065] Conversion program module: u...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses an automatic hardware language transformation system comprising a lexical analysis module, a syntactic analysis and semantic check module, an intermediate representation storage unit and a transformation module. The lexical analysis module is used for transforming a character sequence including keywords, identifiers, constants, character strings, operators and annotations in the Verilog language into tokens. The syntactic analysis and semantic check module is used for realizing syntactic analysis by recognizing structures of expressions, statements, process blocks, modules and the like in a Verilog program according to syntax rules of the Verilog language specified in Bison while performing the semantic check. The intermediate representation storage unit is used for realizing intermediate representation of the different structural bodies of a Verilog source file by the unit of modules. The transformation module is used for transforming the Verilog language into the MSVL (modeling, simulation and verification language) according language transformation rules between the Verilog language and the MSVL.

Description

technical field [0001] The invention relates to the technical field of hardware description language Verilog, in particular to a hardware language automatic conversion system for converting Verilog hardware description programs into equivalent MSVL codes. Background technique [0002] Software simulation is of great significance in hardware design, and it is the main means of logic design, verification and performance analysis. Commonly used commercial simulation products, such as Verilog, are currently the most widely used hardware description language. It is one of the Institute of Electrical and Electronics Engineers (IEEE) standards and is mainly used in digital electronic system design. The language allows designers to use it for various levels of logic design, as well as simulation verification, timing analysis, and logic synthesis for digital logic systems. [0003] At present, the use of commercial simulation software has become the first choice of IC design enginee...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/45
Inventor 段振华刘静黄伯虎田聪王小兵
Owner XIDIAN UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Eureka Blog
Learn More
PatSnap group products