Shifting register unit and gate drive circuit

Abstract

The invention provides a shift register unit and a gate drive circuit, which are used for suppressing output errors caused by threshold voltage drift and gaps in pulling down output terminals, and improving the stability of the shift register unit. In the shift register unit, the pull-down drive module is connected to the first clock signal input end and the second clock signal input end, and is used to respond to the first clock signal, provide the first clock signal to the first pull-down node, and respond to the first clock signal Two clock signals, the second clock signal is provided to the second pull-down node; in response to the voltage signal of the pull-up node, the first low voltage signal is provided to the first pull-down node and the second pull-down node; in response to the first pull-down node pull down the voltage signal of the node, provide the first low voltage signal to the second pull down node; and provide the first low voltage signal to the first pull down node in response to the voltage signal of the second pull down node.

Description

technical field [0001] The invention relates to the technical field of liquid crystal display, in particular to a shift register unit and a gate drive circuit. Background technique [0002] The thin film transistor liquid crystal display (TFT-LCD) driver mainly includes a gate drive circuit and a data drive circuit. The pole driving circuit may be formed in the same process as the TFTs and simultaneously formed on the LCD panel together with the TFTs. The gate driving circuit includes a shift register unit having multiple stages, and each stage is connected to a corresponding gate line to output a gate driving signal. The stages of the gate drive circuit are connected to each other, the start signal is input to the first stage of each stage and the gate drive signal is sequentially output to the gate line, wherein the input terminal of the current stage is connected to the output terminal of the previous stage , and the output terminal of the next stage is connected to the...

AI Technical Summary

Problems solved by technology

[0003] The gate drive circuit with the above structure is installed on the LCD panel. In the current gate drive circuit design, the potential of the output terminal of the non-output line is generally pulled down by setting the pull-down node. However, if the pull-down node is in the DC high-level working state for a long time , may cause the threshold voltage of the relevant thin film transistor to drift, affecting the noise reduction effect; if the voltage signal of the pull-down node is an AC signal, although the impact caused by the threshold drift can be reduced, there is a gap when the AC signal is pulled down, which may Output errors will occur, resulting in read and write errors

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