A method for preparing a large-area and small-size core-shell structure silicon nanowire array

Abstract

The invention belongs to the field of silicon nano material manufacturing, and discloses a method for manufacturing a large-area small-size core-shell structure silicon nanowire array. According to the method, a single layer of densely-distributed small PS balls are distributed on a silicon substrate and subjected to reactive ion etching processing, then the magnetron sputtering method is used for plating silver, and after the small PS balls are removed, the substrate is subjected to silver catalysis corrosion to obtain a silicon nanowire array of a larger diameter; twice dry method oxidation treatments are used for reducing the diameter of the silicon nanowire array to about 50nm; finally, the oxidation self-saturation effect is used for manufacturing the core-shell structure silicon nanowire array with the diameter smaller than 10nm. The silicon nanowire array manufactured through the method can meet the size requirement of silicon-based optical interconnection, single crystal performance is good, a large area can be covered, and draw ratio controllability is strong. The method is low in cost, high in yield, good in controllability and capable of being widely applied to silicon-based optical electronic device production.

Description

technical field [0001] The invention belongs to the technical field of silicon nanomaterial preparation, and in particular relates to a method for preparing a large-area and small-size core-shell structure silicon nanowire array by combining a template-assisted silver catalytic corrosion method and an oxidation self-saturation effect. Background technique [0002] Due to the rich storage of silicon materials, low price, mature silicon-based device preparation technology and stable performance, semiconductor silicon integrated circuits have established a core position in the field of information technology. Semiconductor silicon integrated circuits use electrons as information carriers. However, with the development of computers in the direction of high speed and large capacity, the bottleneck problem of electrical interconnection has gradually become prominent: on the one hand, the transmission speed of electrons is difficult to meet the growing needs of information processin...

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Problems solved by technology

[0004] In experiments, scientists have tried to prepare porous silicon and silicon nanocrystalline structures with a size equivalent to the Bohr radius of silicon, but these two structures have defects of poor electrical conductivity and strong light scattering, which limit their Application on silicon-based optical interconnection

In recent years, scientists have begun to pay attention to the application of small-sized silicon nanowire materials in silicon-based optical interconnects. There are two main preparation methods: one is the gas-liquid-solid method, but the silicon nanowires prepared by this method There are many structural defects in nanowires, which limit its luminous performance; the other is to use electron beam exposure technology combined with oxidation self-saturation effect, but this method not only requires expensive equipment, but also the area and length of the silicon nanowire array prepared The diameter ratio is limited, and it is difficult to further apply to the preparation of silicon-based light-emitting devices

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