Test data compression method, data uncompress device and data uncompress method

Abstract

The invention discloses a deterministic self-testing test data compression method, a data uncompress device and a data uncompress method. The compression method comprises cluster compression, and the combination of the cluster compression, input simplification compression and shifting compression. The data uncompress device comprises a bit counter, a vector quantity counter, a shift counter, a cluster shifting register, an address counter, a comparator, a exclusive-OR gate, an input compression register and a phase inverter. According to the scheme, due to the fact the cluster shifting input simplification compression method is adopted, input compression is firstly conducted on test data with faults difficult to test, cluster compression is conducted on the test data processed by input compression, and shifting compression is conducted on the test data processed by cluster compression, so that the number of memory cells which need to be stored in a built-in self-testing circuit ROM is reduced, and hardware overhead of the built-in self-testing circuit is saved.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a test data compression method, a data decompression device and a decompression method in integrated circuit built-in self-test. Background technique [0002] With the development of EDA (Electronic Design Automation, electronic design automation) tools and the continuous improvement of semiconductor manufacturing technology, the scale of modern integrated circuits is getting larger and larger, and the operating frequency is getting higher and higher. requirements. On the one hand, the operating frequency of integrated circuits increases faster than the operating frequency of automatic test equipment (ATE), making it more and more difficult for ATE to test at the chip operating frequency, and it becomes increasingly difficult to test delay faults and other faults. more and more difficult. On the other hand, the amount of test data required for testing integrated circuits incr...

AI Technical Summary

Problems solved by technology

The disadvantage is that there are many redundant shifts in the decompression operation, and these shift operations take up test time and increase test power consumption

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