Detection method for misalignment between via hole and underlying metal line

Abstract

The invention discloses a method for detecting alignment deviation of through holes and lower layers of metal wires. The method comprises the following steps: arranging a first metal wire and a second metal wire on a wafer, wherein the first metal wire and the second metal wire are parallel to a cutting wire, are in central symmetry, and are not connected, are provided with a plurality of raised metal wires of which the lengths increase or decrease progressively in the vertical direction according to a constant value t; scanning the through holes which are formed between the first metal wire and the second metal wire and in one-to-one correspondence to the raised metal wires; contrasting the image data of the through holes with standard image data without alignment deviation, so as to accurately detect the alignment deviation of the through holes and the lower layers of metal wires. Through the adoption of the method, the precision and repeatability of the integrated circuit manufacture process are guaranteed, and the product yield is further improved.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing technology, in particular to a method for detecting the alignment deviation between a through hole and a lower metal line. Background technique [0002] With the development of large-scale integrated circuit manufacturing towards higher integration, shrinking critical dimensions and increasingly complex device structures, the requirements for the accuracy and repeatability of integrated circuit manufacturing processes are getting higher and higher. In order to meet the requirements of the overall electrical performance of the integrated circuit, in the specific manufacturing process of the chip, circuit patterns of different structures are often stacked together layer by layer. Among them, the stacks in the front-end manufacturing process of integrated circuits are mainly gates and contact holes, and the stacks in the back-end are mainly through holes and metal lines. Since via hol...

AI Technical Summary

Problems solved by technology

However, since the optical method itself is limited by the wavelength resolution, this method cannot be used to accurately detect the alignment deviation between the via hole and the metal line when the device size continues to shrink, so that the accuracy and reliability of the integrated circuit manufacturing process cannot be guaranteed. Repeatability, which in turn cannot meet the requirements of precise process control to improve product yield

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