Memory structure replacing dual-port static memory

Abstract

The invention discloses a memory structure replacing a dual-port static memory. The memory structure comprises a plurality of one-port static memories and a plurality of selection circuits. Each of the one-port static memories is provided with an independent clock, a bus signal, and independent empty-full state flag bits. Each of the selection circuits is provided with two access ports. The clocks and the bus signals are respectively inputted into the access ports. Output ports of the selection circuits are connected to the one-port static memories. Control signals of the selection circuits comprise data stream directional signals, and outputting signals of the empty-full state flag bits of the one-port static memories. The selection circuits under the control of the control signals are used for switchover of the clocks and the bus signals of the one-port static memories. According to the data stream direction and empty-full states of the one-port static memories, the clocks of the one-port static memories are switched to the working clock of a corresponding access ports. The memory structure can reduce the chip area and the chip cost.

Description

technical field [0001] The invention relates to the field of memory, in particular to a memory structure replacing a dual-port static memory. Background technique [0002] With the development of semiconductor and electronic technology, there are more and more functions to be completed on a single chip, which makes the design of the chip circuit more and more complicated. There are multiple clock domains on the chip, and cross-clock domain design has become a norm. A large amount of data is transmitted between different clock domains, how to deal with these bulk data across clock domains has also become a key issue. [0003] The current common practice is to use a dual-port static memory as an intermediate memory for data transmission across clock domains. The dual-port static memory can work in two clock domains, thereby realizing data conversion in different clock domains. [0004] However, the area of ​​the dual-port static memory is about 50% larger than that of the sin...

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Problems solved by technology

[0004] However, the area of ​​a dual-port static memory is about 50% larger than that of a single-port static memory with the same storage capacity, so it does not have an advantage in chip area and chip cost

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