Method for realizing IEEE1588 master clock

Abstract

The invention discloses a method for realizing an IEEE1588 master clock. The method comprises the following steps: receiving ethernet messages, and identifying and classifying the ethernet messages; performing receiving timestamp inserting operation on message data needing to be inserted with timestamps; analyzing the messages of the message data after inserting the timestamps, and extracting a first parameter needed for generating reply messages; generating PTP (picture transfer protocol) protocol reply messages according to the first parameter; buffering the generated PTP protocol reply messages, buffering the received message data, and transmitting buffered ethernet messages under transmitting dispatching control; identifying and classifying the buffered ethernet messages to obtain classified message data; when in a two-step mode, generating two-step PTP protocol messages, and transmitting all the ethernet messages to a PHY (Physical Layer Protocol) transmitting interface; when in a one-step mode, transmitting the PTP protocol messages after treating and the ethernet messages which do not need treating to the PHY transmitting interface.

Description

technical field [0001] The invention relates to the field of information technology processing, in particular to a method for realizing an IEEE1588 master clock. Background technique [0002] As the most widely used communication network, Ethernet has become the main development direction of the communication bearer network due to its superior cost performance, high technology maturity and high transmission rate. With the development of the network, profound changes have taken place in the networking form, service type and application occasions of the network. In the process of Ethernet moving towards network convergence, the normal operation of many services requires accurate clock synchronization. Therefore, the clock The need for synchronization puts higher and higher demands on it. For example, in 3G and 4G mobile communication networks, not only frequency synchronization is required between base stations, but also time synchronization is becoming more and more stringen...

AI Technical Summary

Problems solved by technology

[0017] The embodiment of the present application provides a method and device for implementing an IEEE1588 master clock, which solves the problems of the PTP protocol message processing technology in the prior art, which has a large load on the CPU and low processing efficiency, and the synchronization accuracy and processing capacity of the PTP time synchronization system are low. To solve the technical problems, the CPU load of the PTP time synchronization system is reduced, the processing efficiency is high, the synchronization accuracy and processing capacity of the system are improved, and the technical effect of saving processing time is achieved, thereby meeting the application requirements of the master clock with a large amount of PTP business processing.

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