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SFDR testing method based on five-maximum-sidelobe-damping-window three-spectral-line interpolation

A technology of sidelobe attenuation and three-spectrum line, applied in the field of integrated circuit testing, can solve problems such as complex implementation, large test error, and leakage

Inactive Publication Date: 2014-05-14
JIANGNAN UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

For example, a new method of post-sampling coherence is used to suppress spectrum leakage, and the test signal is recovered through signal reconstruction, and the signal power is calculated in the time domain, thereby reducing the impact of the fence effect on the test results. However, its implementation is more complicated and the error is larger. ; Or add Hanning window or Blackman-Harris window to suppress spectrum leakage, and correct the amplitude of fundamental wave and harmonic by interpolating the two spectral lines within the signal and harmonic energy range, the leakage suppression effect is better, but SFDR test error is still large

Method used

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  • SFDR testing method based on five-maximum-sidelobe-damping-window three-spectral-line interpolation
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  • SFDR testing method based on five-maximum-sidelobe-damping-window three-spectral-line interpolation

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Embodiment Construction

[0050] The present invention will be further described below in conjunction with the accompanying drawings and examples of implementation. The invention is a method for testing SFDR based on the trispectrum interpolation of five maximum side lobe attenuation windows, and the sample data comes from an ADC test system.

[0051] Such as figure 1 As shown, the ADC test system includes an analog signal source 1 , a bandpass filter 2 , a clock source 3 , an ADC sub-board 4 to be tested, a data acquisition system 5 , and a MATLAB analysis program 6 . Its workflow is: the analog signal source 1 is input to the ADC sub-board 4 under test through the band-pass filter 2 and the clock source 3, the data acquisition system 5 collects the digital signal output by the ADC sub-board 4 under test, and is tested by the MATLAB analysis program 6 SFDR parameters and display test results.

[0052] attached figure 2 Shown is the flow chart of testing ADC SFDR provided by the present invention. ...

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Abstract

The invention discloses an SFDR testing method based on five-maximum-sidelobe-damping-window three-spectral-line interpolation. Initialization setting of an SFDR testing program is completed, and sampling data are obtained through an ADC testing system; five maximum sidelobe damping windows are established, and sampling data are subjected to windowing FFT operation; a spectral line with the maximum amplitude and left and right spectral lines thereof are subjected to searching in FFT spectral lines for base waves and each harmonic wave, and the ratio of the difference of the amplitudes of the left and right spectral lines and the maximum spectral line amplitude is obtained; the mode of approximation by polynomial is used for obtaining the interpolation coefficients of the base waves and each harmonic wave; and finally, the correction amplitudes of the base waves and each harmonic wave are obtained through interpolation operation, the correction amplitudes are put into an ADC SFDR computational formula, and testing results are obtained. The ADC SFDR testing method based on five-maximum-sidelobe-damping-window three-spectral-line interpolation is provided for the first time. The method has the advantages that spectrum leakage and picket fence effect can be effectively restrained, and ADC SFDR is tested quickly and accurately.

Description

technical field [0001] The invention belongs to the field of integrated circuit testing, and in particular relates to a method for testing SFDR of an ADC, in particular to a method for testing SFDR based on trispectrum interpolation of five maximum side lobe attenuation windows. Background technique [0002] Spurious-Free Dynamic Range (SFDR) is an important technical indicator of an analog-to-converter (ADC), which mainly characterizes that the ADC can simultaneously detect when a very large signal exists very small signal capability. The Fast Fourier Transformation (FFT) method is a widely used method for testing the SFDR of an ADC. However, it is difficult to achieve synchronous sampling and full-period truncation when using the FFT method for testing, resulting in spectrum leakage and fence effects, resulting in large errors in the measured SFDR. In order to reduce the spectrum leakage, the window function with small side lobe peak level and large side lobe attenuation...

Claims

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Application Information

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IPC IPC(8): H03M1/10
Inventor 虞致国何芹顾晓峰赵琳娜
Owner JIANGNAN UNIV
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