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Verification platform and verification method for ARINC659 bus fault-tolerant circuit

A technology of fault-tolerant circuit and verification platform, which is applied in the direction of functional inspection and detection of faulty computer hardware, etc., and can solve problems such as difficult to meet the requirements of design verification

Inactive Publication Date: 2014-05-21
AVIC NO 631 RES INST
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Problems solved by technology

In order to realize the design of a circuit that fully meets the requirements of the ARINC659 bus specification, it is necessary to design a verification method that can completely and fully verify the design requirements of the circuit. The traditional verification method for the circuit cannot solve the special requirements of the circuit verification. The high fault tolerance and high real-time characteristics of the ARINC659 bus fully verify the circuit, which is difficult to meet the requirements of design verification

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  • Verification platform and verification method for ARINC659 bus fault-tolerant circuit

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Embodiment Construction

[0026] In the verification of the ARINC659 bus protocol processing circuit design, a verification method that can fully and fully verify the fault-tolerant performance of the ARINC659 bus is designed; the method is mainly composed of a verification platform and various verification modules. Including ARINC659 bus fault-tolerant circuit to be tested, test module, bus module, host test module, interrupt detection processing module, clock reset module, memory module, ARINC659 bus transceiver module, ARINC659 bus fault injection verification module and ARINC659 bus signal detection verification module ;Aiming at the high fault-tolerant performance of ARINC659 bus, designing ARINC659 bus fault injection verification module and ARINC659 bus signal detection verification module can fully verify the fault-tolerant performance of ARINC659 bus.

[0027] The present invention will be described in further detail below. see figure 1 , the present invention is a verification method of an A...

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Abstract

The invention relates to a verification platform and a verification method for an ARINC659 bus fault-tolerant circuit. The verification platform comprises a host testing module, a break detection processing module, a host bus, an ARINC659 bus fault-tolerant circuit to be tested, a clock resetting module, a memory module, a transceiver module, an ARINC659 bus, a fault injection verification module and a bus signal detection module, wherein the host testing module and the break detection processing module are connected to the ARINC659 bus fault-tolerant circuit to be tested through the host bus respectively; the fault injection verification module and the bus signal detection module are connected to the ARINC659 bus fault-tolerant circuit through the ARINC659 bus respectively; the clock resetting module and the memory module are connected to the ARINC659 bus fault-tolerant circuit respectively. According to the verification platform and the verification method for the ARINC659 bus fault-tolerant circuit, an ARINC659 bus protocol processing circuit can be comprehensively and fully verified, and a verification result is high in reliability.

Description

technical field [0001] The invention belongs to the technical field of computer hardware technology, and relates to a verification platform of an ARINC659 bus fault-tolerant circuit and a verification method thereof. Background technique [0002] In the design of computer local area network with higher throughput, strict fault isolation and definite characteristics of data transmission, the application of ARINC659 bus is an ideal choice. In order to realize the design of a circuit that fully meets the requirements of the ARINC659 bus specification, it is necessary to design a verification method that can completely and fully verify the design requirements of the circuit. The traditional verification method for the circuit cannot solve the special requirements of the circuit verification. The characteristics of high fault tolerance and high real-time performance of ARINC659 bus fully verify the circuit, but it is difficult to meet the requirements of design verification. Co...

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Application Information

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IPC IPC(8): G06F11/26
Inventor 田泽马宁许宏杰杨峰郭亮刘宁宁淮治华
Owner AVIC NO 631 RES INST