Register transport level N-modular redundancy verifying method

Abstract

The invention discloses a register transport level N-modular redundancy semi-automatization verifying method. The method comprises the steps of checking output of registers of a platform to be verified of n-modular redundancy; receiving output values of the registers 1-n of the platform to be verified, judging whether the output values of the registers 1-n are equal or not, and if the output values of the registers 1-n are equal, passing the verifying step; defining binary system value data; adding 1 to the lowest order of data by each system clock, giving each order of n orders of the data to the registers 1-n respectively, outputting a vote output result on a falling edge of each system clock by the platform to be verified according to values of the registers 1-n of a rising edge of each system clock; calculating the number of all the registers of which a register value is 1 and 0 in each system clock, if the number of the registers of which the register value is 1 is more, making a is equal to1, and if the number of the registers of which the register value is 0 is more, making a is equal to 0; detecting whether the vote output result of the platform to be verified is equal to a or not, and if the vote output result of the platform to be verified is equal to a namely the value of the most quantity, passing the verifying step.

Description

technical field [0001] The invention relates to the field of integrated circuit verification, in particular to a verification method for register transmission level N-mode redundancy. Background technique [0002] In some harsh electromagnetic and radiation environments, integrated circuits are often disturbed. For example, a single high-energy particle in the universe is injected into the sensitive area of ​​a semiconductor device, causing the logic state of the device to reverse: the original stored "0" becomes "1" , or a "1" becomes a "0", causing the system to malfunction. In order to allow integrated circuits to work normally in harsh environments, such as aerospace, satellite and other fields, anti-radiation noise design with fault tolerance mechanism has been widely used. The fault-tolerant method widely adopted at present is N-module redundancy. N modules perform the same operation at the same time, and most of the same outputs are used as the output of the voting s...

AI Technical Summary

Problems solved by technology

Physical verification has the following disadvantages: verification cost is too high; fault injection is uncontrollable

Traditional simulation verification has the following disadvantages: Verifiers need to manually flip the N-mode redundant registers to be tested to implement fault injection. When the number of registers is large, the workload is very heavy, and it may not be able to cover all situations, and the automation level is not high; the result analysis The verifier needs to observe the waveform to get it, and the observability is poor

Images