FPGA high-speed USB interface data reading method

Abstract

The invention relates to a FPGA high-speed USB interface data reading method. The method includes 1, initializing an ARM; 2, monitoring FPGA initializing operation; 3, extracting transmitted data parameters, namely allowing an ARM processor to read USB externally-arranged transmitted data information, and calculating the number of transmitting; 4, starting data transmitting; 5, judging the FPGA prepared receiving state; 6, transmitting data by framing; 7, judging whether the data are completely transmitted or not, namely allowing a control module in the ARM processor to figure out whether all data are completely transmitted or not; if not, turning to the step 5 to transmit data continuously; if so, stopping transmitting data; 8, finishing data transmitting. FPGA reading data of a USB device is indirectly realized by adopting the ARM processor, workload of FPGA control and management of the USB device is reduced greatly, FPGA resource consumption is saved, and FPGA cost is reduced indirectly.

Description

technical field [0001] The invention relates to the field of USB interfaces of electronic equipment, in particular to a method for realizing high-speed acquisition of large-capacity data by the USB interface based on FPGA. Background technique [0002] USB has the characteristics of fast transmission rate, plug and play, high flexibility, low cost and easy to use. USB interface is more and more favored by consumers and researchers. USB standard interface is gradually replacing other interfaces and has become an external computer interface. The most widely used standard interface for equipment. Due to its high integration, high speed, and programmable advantages, FPGA has promoted the single-chip and automatic development of digital system design, and has a very wide range of applications in ultra-high-speed signal processing and real-time measurement and control. Therefore, it has become an important means of embedded electronic system design to combine FPGA with USB interf...

AI Technical Summary

Problems solved by technology

However, CH376 only supports FAT16 / 32 file system, not NTFS file system, and cannot read large files larger than 4GB; at the same time, CH376 needs FPGA for configuration and control, so it needs to implement the control logic of CH376 and occupy certain FPGA resources. The actual CH376 The average data transmission speed of the chip is relatively slow, and it is difficult to meet the high-speed transmission requirements

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