Polysilicon residue monitoring structure

Abstract

The invention discloses a polycrystalline silicon residue monitoring structure. The polycrystalline silicon residue monitoring structure comprises a grounded semiconductor substrate, multiple first polysilicon gate structures, multiple second polysilicon gate structures, multiple contact bore log plugs, a first test pin and a second test pin, wherein an active region is formed in the semiconductor substrate; the first polysilicon gate structures and the second polysilicon gate structures are arranged in parallel on the active region in a staggered mode; each contact bore log plug is formed between the corresponding first polysilicon gate structure and the corresponding second polysilicon gate structure adjacent to the corresponding first polysilicon gate structure on the active region; the first test pin is connected with the first polysilicon gate structures; the second test pin is connected with the second polysilicon gate structures. By means of the polycrystalline silicon residue monitoring structure, polycrystalline silicon residues can be effectively monitored.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a monitoring structure for polysilicon etching residue. Background technique [0002] Semiconductor devices include multiple polysilicon gates (Poly) formed on the active region and arranged in parallel. In the process of forming polysilicon gates, the etching process often has the problem of etching residues. Therefore, it is necessary to etch the polysilicon residues. Monitoring is carried out to detect this problem in time during the test phase and reduce yield loss. [0003] In the prior art, a comb-shaped monitoring structure is usually used to monitor the leakage problem caused by the etching residue of the polysilicon gate during the wafer acceptance test (WAT) stage, but it has certain limitations. Such as figure 1 As shown, the monitoring structure includes a plurality of gate polysilicons arranged in parallel on the active region 100 , the gate polysilicon 110 ...

AI Technical Summary

Problems solved by technology

However, for the case where the polysilicon residue does not cause a short circuit, such as only one side of the polysilicon residue in area B, it cannot be detected by relying on the existing comb-shaped monitoring structure

However, this type of polysilicon residual problem will still lead to yield loss and reliability risks, especially in the design rule marginal area. Since the wiring design just meets the minimum requirements of the design rule, it is easy to cause insufficient process margin, thus Short circuit between polysilicon gate and active area causes polysilicon gate leakage

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