Matrix multiplication calculating device and matrix multiplication calculating method both oriented to programmable algebra processor
A matrix multiplication and computing device technology, applied in the field of matrix multiplication computing devices, can solve the problem of low execution efficiency of large-scale and small matrix multiplication, and achieve the effect of improving computing efficiency
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[0027] In view of the existing situation, the present invention proposes a method and device for efficiently calculating matrix multiplication, which is particularly suitable for large-scale small matrix multiplication.
[0028] The large-scale small matrix multiplication vectorization device proposed by the present invention includes: a multi-granularity parallel memory 10, a data cache device 20, a data broadcast cache device 30, and a vector operation device 40. among them:
[0029] The multi-granularity parallel memory 10 is used to store multiple matrices to be multiplied, broadcast indexes, and results after matrix multiplication. The broadcast index is used to broadcast each data in the matrix. The read and write bit width of the memory is consistent with the bit width of the register file 201 of the data cache device, the bit width of the relevant register in the data broadcast cache device, and the operation size of the vector operation device 40, denoted as P.
[0030] Th...
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