Through-silicon via patch board testing method

Abstract

The invention provides a through-silicon via patch board testing method. By means of the method, electric testing can be conducted on a through-silicon via patch board simply and conveniently, the through-silicon via patch board is effectively prevented from being scratched and damaged during testing, the electric testing efficiency of the through-silicon via patch board and the testing effect of the through-silicon via patch board are guaranteed, and the packaging quality of a follow-up chip is guaranteed. The through-silicon via patch board testing method is characterized by comprising the following steps that (1) patch board equipment is tested, pads are manufactured on a testing patch board, and probe leads are used for leading a welding disk out of the other face of the testing patch board; (2) a temporary welding method is used for physically connecting protrusions (solder balls) on the through-silicon via patch board to the testing patch board.

Description

technical field [0001] The invention relates to the technical field of microelectronic testing in the microelectronic industry, in particular to a testing method for a through-silicon hole adapter board. Background technique [0002] With the development of large-scale integrated circuits, the lines are getting thinner and thinner, and the traditional two-dimensional semiconductor manufacturing technology is facing great challenges. The use of three-dimensional integration technology can shorten the interconnection path, reduce delay, reduce power consumption, and obtain higher performance at the same time. Become the development trend of the semiconductor industry in the future. Through-silicon via technology is the core technology to realize three-dimensional integration. It forms vertical interconnection channels by directly making conductive vias on different types of chips. At present, one way is to make an adapter board through silicon vias, and realize high-density i...

AI Technical Summary

Problems solved by technology

Because TSV interposers are very thin, the material is brittle, and the density of pads (bumps) is high, double-sided testing is required, and traditional testing techniques are difficult to use

As the I / O density on the semiconductor chip is getting higher and higher, and the size of the pad is getting smaller and smaller, when performing electrical tests on the TSV adapter board, see figure 1 , the existing electrical test adopts the method of probe contact, the probe 3 is contacted with the pad 2 on the TSV adapter board 1, the TSV adapter board to be tested is drawn out, and the silicon through the probe is realized. Electrical testing of through-hole adapter boards. This test method will cause scratches and damage to through-silicon via adapter boards, which will affect the quality of subsequent packaging. The thickness of silicon wafers is getting thinner and thinner, which makes it difficult to hold and test. It affects the electrical test efficiency and test effect of the TSV adapter board

Images