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Low Dropout Linear Regulators

A low-dropout linear and voltage regulator technology, which is applied in the direction of instruments, electrical variable adjustment, control/regulation systems, etc., can solve the problems of LDO output voltage fluctuations, LDO power supply rejection ratio, etc.

Active Publication Date: 2015-12-02
HANGZHOU SILAN MICROELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, existing LDOs can still be adversely affected by high frequency power supply noise
Spike power supply glitches cause voltage fluctuations at the output of the LDO
As a result, the power supply rejection ratio of the LDO is still poor

Method used

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Embodiment Construction

[0031] Hereinafter, various embodiments of the present invention will be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are represented by the same or similar reference numerals. For the sake of clarity, the various parts in the drawings are not drawn to scale.

[0032] figure 1 It is a schematic circuit diagram of a low dropout linear regulator LDO according to the prior art. The LDO has a cascade structure including a first transistor MN1, a second transistor MP1, and sampling resistors R1 and R2 between the second transistor MP1 and the ground. The intermediate node of the second transistor MP1 and the sampling resistor R1 serves as an output terminal.

[0033] The conductivity types of the first transistor MN1 and the second transistor MP1 are opposite. In one example, the first transistor MN1 is an N-type MOSFET, and the second transistor MP1 is a P-type MOSFET. The drain of the first transistor MN1 is conne...

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Abstract

The invention discloses a low dropout regulator. The low dropout regulator comprises a main current path, a sampling resistance network, a charge pump, an operational amplifier and a clamping circuit. The main current path comprises a cascade structure composed of a first transistor and a second transistor, wherein the conduction types of the first transistor and the second transistor are opposite, one end of the main current path servers as the input end, and the other end of the main current path serves as the output end. The sampling resistance network is connected between the output end and the ground and used for providing the sampling voltage of the output voltage. The charge pump is used for generating the first grid voltage and providing the first grid voltage to the grid electrode of the first transistor. The operational amplifier is used for generating the second grid voltage according to the sampling voltage and the reference voltage and providing the second grid voltage to the grid electrode of the second transistor. The clamping circuit is connected between the output end of the charge pump and the power supply end of the operational amplifier and used for maintaining the voltage difference between the power supply voltage of the first grid voltage and the power supply voltage of the operational amplifier as a constant value. The low dropout regulator can increase the power supply rejection ratio and improve reliability.

Description

Technical field [0001] The present invention relates to a linear regulator, and more specifically, to a low-dropout linear regulator. Background technique [0002] Low dropout regulator (lowdropout regulator, abbreviated as LDO) can provide an output voltage independent of power supply and ambient temperature, has a certain load capacity, and has been widely used in various power chips. Compared to traditional linear regulators, LDO allows a smaller voltage difference between the input and output. For example, the input terminal voltage of the LDO can be only 1.7V higher than the output terminal voltage, or less. [0003] An important parameter of LDO is the power supply rejection ratio (PowerSupplyRejectionRatio, abbreviated as PSRR), that is, the ratio of the input voltage change to the output voltage change. If the power supply suppression is relatively large, the LDO can also provide a stable output terminal voltage in a poor power supply environment. For example, when an LD...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05F1/56
Inventor 郑烷胡铁刚
Owner HANGZHOU SILAN MICROELECTRONICS
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