A gate drive circuit, a drive method thereof, and a display device

Abstract

There is provided a gate driving circuit and driving method thereof, and display apparatus. The method comprises: performing gate drive scanning on shift register units located in a first region in the gate driving circuit; performing touch scanning after the gate drive scanning of the shift register units in the first region is completed; scanning again a last stage of shift register unit located in the first region before the touch scanning is completed, so that the last stage of shift register unit located in the first region pre-charges a first stage of shift register unit located in a second region; and performing gate drive scanning on shift register units located in the second region in the gate driving circuit, the last stage of shift register unit located in the first region connected in cascades with the first stage of shift register unit located in the second region.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to a gate driving circuit, a driving method thereof, and a display device. Background technique [0002] With the increasing popularity of touch-sensitive display devices, people's requirements for the quality of touch-sensitive display devices are also getting higher and higher. advantages and are widely used. [0003] The embedded touch technology means that the touch elements are integrated into the display panel, so that the panel itself has a touch function, and the touch effect and application can be achieved without additional lamination and assembly with the touch panel. Taking a typical TFT-LCD (ThinFilmTransistor-LiquidCrystalDisplay, Thin Film Field Effect Transistor Liquid Crystal Display) as an example, it is characterized in that the manufacturing technology of the touch sensing element is completed in the TFT-LCD standard process. Since no additional touch p...

AI Technical Summary

Problems solved by technology

In the existing technology, such as image 3 As shown, the shift register unit takes the simplest 4T1C structure as an example, when the figure 1 During the H-Blank timing scan shown, since the N / 2+1 row shift register unit is the first row of the second 1 / 2 display scan, but its pull-up control PU node outputs at row N / 2 It has been charged to a high level, because there is a long scan time between the output of N / 2 and N / 2+1 rows, so the potential of the PU point will leak through the connected TFT, which will seriously affect the N / 2+1 The pre-charging of the row shift register unit makes the voltage drop when the N / 2+1 row shift register unit outputs, resulting in insufficient charging rate of the pixels in this row, and poor dark or bright lines appear.

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