a substrate

Abstract

The present invention relates to a substrate comprising a build-up and a solder resist layer disposed on the build-up. The solder resist layer has an upper surface facing away from the build-up. The solder resist layer has a plurality of grooves on its upper surface. The grooves of the solder resist layer can better eliminate or relieve the stress accumulated on large solder resist area induced by heat and / or material coefficient of thermal expansion mismatch of the substrate and thus can prevent and diminish warpage of the substrate or package.

Description

technical field [0001] The present invention relates generally to semiconductor technology, including flip chip technology. In particular, the present invention relates to a substrate, in particular to a stress relief pattern on a solder resist layer of the substrate. Background technique [0002] In the field of chip packaging technology, chips are usually mounted on a substrate, and the substrate usually includes a build-up layer and a solder resist layer disposed on the build-up layer. The pattern of the solder resist layer on the build-up layer of the existing substrate is in the form of a continuous flat plate. figure 1 A conventional substrate 100 is shown in which the pattern of the solder resist layer 101 on the build-up layer 102 is a continuous flat plate. However, this type of solder mask pattern has various drawbacks. For example, the mismatch of the coefficient of thermal expansion (CTE) between the substrate and the chip mounted on it will cause high stress, ...

AI Technical Summary

Problems solved by technology

However, this type of solder mask pattern has several drawbacks

For example, the mismatch of the coefficient of thermal expansion (CTE) between the substrate and the chip mounted on it will cause high stress, and this continuous flat pattern of solder mask is not conducive to reducing the accumulation of solder mask in large area to relieve the stress caused by the mismatch of the thermal expansion coefficient of the substrate material, which makes the substrate more prone to warping

In addition, this pattern of solder mask in the prior art is not conducive to reducing the risk of chip cracks that may be caused by the mismatch of thermal expansion coefficients between the chip and the substrate.

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