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Power saving control circuits and electronic equipment

A power-saving control and circuit technology, applied in the electronic field, can solve the problems of cutting off the output voltage, power consumption of the chip, and failure to restart the output, etc., to achieve the effect of reducing power consumption

Active Publication Date: 2017-04-19
TENDYRON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, any low power consumption mode currently only turns off some unused control units, and the chip still consumes power.
[0003] And LDO (Low Drop-Out Regulator, low-dropout linear regulator) is designed in the MCU system to provide a stable and suitable voltage for the operation of the MCU chip. However, in the traditional way of use, the output terminal (Vout) of the LDO can only Provide a stable output voltage, cannot cut off its own output voltage by itself, let alone restart the output under appropriate incentives

Method used

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  • Power saving control circuits and electronic equipment
  • Power saving control circuits and electronic equipment
  • Power saving control circuits and electronic equipment

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0046] figure 2 Shows a schematic diagram of the power saving control circuit provided by Embodiment 1 of the present invention, see figure 2 , The power saving control circuit of Embodiment 1 of the present invention includes:

[0047] The power supply is connected to the power input pin Vin of the LDO. The power supply is connected to the ground through the third capacitor C3 and the second resistor (protection circuit) R2 connected in parallel. The power supply is connected to the switch pin Ven of the LDO through the first capacitor (power-on shock capacitor) C1, LDO The switch pin Ven of the second capacitor (anti-jitter circuit) C2 and the first resistor (protection circuit) R1 connected in parallel to one end of the third resistor (current limiting circuit) R3, the third resistor (current limiting circuit) R3 The other end is connected to the control pin MCU-POWEREN of the MCU, the power output pin Vout of the LDO is grounded through the fourth capacitor C4, and the power...

Embodiment 2

[0049] image 3 Shows a schematic diagram of the power saving control circuit provided in Embodiment 2 of the present invention, see image 3 , The power saving control circuit of Embodiment 2 of the present invention includes:

[0050] The power supply is connected to the power input pin Vin of the LDO. The power supply is connected to the ground through the seventh capacitor C7 and the sixth resistor (protection circuit) R6 connected in parallel. The power supply is connected to the switch pin Ven of the LDO through the fifth capacitor (power-on shock capacitor) C5, LDO The switch pin Ven of the MCU is connected to the control pin MCU-POWEREN of the MCU through the fifth resistor (current limiting circuit) R5, and the control pin MCU-POWEREN of the MCU is connected to the seventh resistor (protection circuit) R7 and the sixth capacitor (protection circuit) in series. The dither circuit) C6 is grounded, the power output pin Vout of the LDO is grounded through the eighth capacit...

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Abstract

The invention provides an electricity-saving control circuit and electronic equipment. The electricity-saving control circuit comprises an LDO, a power-on impact capacitor and an MCU, the LDO comprises a power source input pin, a switch pin and a power source output pin, one end of the power-on impact capacitor is connected with the power source input pin, the other end of the power-on impact capacitor is connected with the switch pin, the MCU comprises an MCU power source pin and an MCU control pin, the MCU power source pin is connected with the power source output pin, and the MCU control pin is connected with the switch pin. The MCU is used for being triggered by a preset trigger condition to output low levels to the MCU control pin under a normal mode to enter in an electricity saving mode, and according to the normal mode, the MCU outputs high levels to the MCU control pin. According to the electricity-saving control circuit and the electronic equipment, power consumption can be reduced to the maximum extent when an MCU system with the LDO is in a low power consumption mode, and the electricity consumption is zero when the MCU is idle or does not need to work. The enabling control function of the switch pin of the LDO is utilized, the power supply of the MCU can be powered off automatically, and the power supply can be restarted under proper excitation.

Description

Technical field [0001] The present invention relates to the field of electronic technology, in particular to a power saving control circuit and electronic equipment. Background technique [0002] At present, MCU (Micro Control Unit, micro control unit) chip design process has a low power consumption mode setting, so as to make the chip more power-saving when it is idle. However, any current low power consumption mode only turns off some unused control units, and the chip still consumes power. [0003] And the LDO (Low Drop-Out Regulator, low dropout linear regulator) is designed in the MCU system to provide a stable and suitable voltage for the work of the MCU chip. However, in the traditional use mode, the LDO output (Vout) can only Provide a stable output voltage, can not cut off its own output voltage by itself, let alone restart the output under suitable excitation. [0004] Therefore, how to ensure that the MCU system with LDO minimizes power consumption in the low power consu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05B19/04
Inventor 李东声
Owner TENDYRON CORP