Anti-noise gradual approximation type analog digital conversion device and method thereof

Abstract

The invention discloses an anti-noise gradual approximation type analog digital conversion device and a method thereof. The device mainly comprises a gradual approximation type analog digital converter, a digital error correction circuit and a redundancy comparison control circuit, wherein the gradual approximation type analog digital converter comprises a first comparator, a digital analog converter and a gradual approximation type control circuit. The method comprises steps that: a redundancy comparison period is carried out in a random valid bit period, before accomplishment of the redundancy comparison period, comparison motion is carried out only by a comparator, extra digital analog feedback is not carried out, after all outputs of the comparator within the redundancy comparison period are filtered through a digital low pass filter or is checked through a reference table, a digital value set is outputted, and a digital value is designated as the digital value in the valid bit period.

Description

technical field [0001] The present invention relates to analog / digital converter technology, in particular to an analog-to-digital conversion device and method thereof with anti-noise gradual approximation, especially an analog-to-digital converter (analog-to-digital converter; ADC) with anti- Noise-capable progressive-approximation analog-to-digital converters. Background technique [0002] There are various architectures of analog-to-digital converters, such as flash ADC, pipelined ADC, and successive-approximation-register (SAR) ADC. Each of these architectures has its own advantages and is usually selected based on different application requirements. Among them, the progressive approximation ADC consumes lower power, smaller area and lower cost than other architectures. [0003] Traditionally, SAR ADCs use a binary search algorithm (binary search algorithm) to obtain a digital output code that matches the input signal. During the conversion process, according to the...

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Problems solved by technology

However, in the process, the conversion may be distorted due to the noise of the circuit itself.

[0004] To improve the anti-noise ability of SAR ADC, SAR ADC is traditionally designed to be quite low noise, and the price paid is the increase of circuit cost, such as area and power consumption. In addition, there are several known methods and technologies that can be used in SAR The ADC tolerates noise in a part of the bit period. This technique uses error compensation to tolerate the additional benefits of settling errors. Therefore, it can tolerate noise interference in a part of the bit period, but it cannot solve the problem. And the last few bit transitions without error tolerance will still be disturbed by the same degree of noise to distort the transition

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