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Nonvolatile memory cell structure and method for reading the same

A memory cell, non-volatile technology, used in read-only memory, static memory, information storage, etc., to solve problems such as increasing oxide breakdown of select transistors

Active Publication Date: 2014-10-01
EMEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, such a high voltage drastically increases the risk of oxide breakdown of the select transistor

Method used

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  • Nonvolatile memory cell structure and method for reading the same
  • Nonvolatile memory cell structure and method for reading the same
  • Nonvolatile memory cell structure and method for reading the same

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Embodiment Construction

[0056] The present invention relates to a novel non-volatile memory cell structure. This novel nonvolatile memory cell structure has an adjustable current path, so that the write voltage and read voltage for the new nonvolatile memory cell structure can be simplified to only high voltage or low voltage instead of Medium voltage is required.

[0057] The novel nonvolatile memory cell structure of the present invention can have many structural variations due to optional components. Figure 1A to Figure 4E Shown are various examples of non-volatile memory cell structures of the present invention. First, please refer to Figure 1A or Figure 1B , showing two examples of symmetrical nonvolatile memory cells. The nonvolatile memory cell structure 101 of the present invention may include a substrate 110, a first doped well 120, a second doped well 130 as needed, a shallow trench isolation group, and a drain / source doped region 151 / 152 and antifuse gate 160. The substrate 110 may...

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Abstract

A nonvolatile memory cell structure (102, 103, 104) includes a substrate (110) of a first conductivity, a first doping well (121) of a second conductivity disposed in said substrate (110), a second doping well (131) of said first conductivity disposed in said substrate (110), an antifuse gate (160) disposed on said first doping well (121), and a drain doping region (151) away from said antifuse gate (160). The antifuse gate (160) includes a gate conductive layer (161) disposed on said first doping well (121) and a gate oxide layer (162) disposed between said gate conductive layer (161) and said first doping well (121) and directly contacting said first doping well (121) . A current path (129) from said antifuse gate (160) to said drain doping region (151) travels through said first doping well (121) and said second doping well (131).

Description

technical field [0001] The present invention generally relates to a non-volatile memory cell structure and a method of writing and reading the non-volatile memory cell structure. In particular, the present invention is directed to a non-volatile memory cell structure in the form of an antifuse, and a method of reading such a non-volatile memory cell structure. Background technique [0002] Memory devices can generally be classified into volatile memory devices and non-volatile memory devices. In nonvolatile memory devices, stored data can persist even when the power is turned off. This persistent nature allows non-volatile memory devices to be used to store data in applications such as mobile phones, digital cameras, video players, or personal digital assistants (PDAs). [0003] In the current one-time programming memory (OTP) technology, there may be various bottlenecks. For example, an ultra-high voltage device, such as 13.5V or 20V, is required to implement programming...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/112G11C17/18H10B20/00
CPCH01L27/0733H01L27/0629H01L23/5252G11C17/16H01L27/11206H01L2924/0002H10B20/25H01L2924/00
Inventor 吴孟益黄志豪温岳嘉陈沁仪陈稐寯陈信铭
Owner EMEMORY TECH INC