Generation Method of Arbitrary Level Checkerboard Screen Components Based on FPGA

Abstract

The invention discloses a method for generating a checkerboard picture component of any order based on FPGA. The horizontal coordinate points are divided into multiple consecutive horizontal blocks, and the odd horizontal blocks are marked as the first mark value, and the even horizontal blocks are marked as the second mark value; the vertical coordinate points within the range of the checkerboard screen are divided into multiple continuous vertical blocks , and mark the odd-numbered vertical blocks as the first mark value, and the even-numbered vertical blocks as the second mark value; 3: Scan each coordinate point within the range of the checkerboard screen, if the horizontal mark value of the scanned coordinate point is the same as If the vertical marker values ​​of the coordinate points are the same, then the color value of the coordinate point is set as the first color value, otherwise it is set as the second color value. The present invention can utilize FPGA to generate complex logical pictures such as checkerboard picture components of any order.

Description

technical field [0001] The present invention relates to the technical field of liquid crystal module testing, in particular to an FPGA (Field-Programmable Gate Array, Field Programmable Gate Array)-based method for generating checkerboard picture components of any order. Background technique [0002] With the increasing popularity of home theaters, large-screen, high-resolution liquid crystal displays have gradually become the mainstream. In the production process of liquid crystal displays, they need to be detected by picture signal generators. [0003] The traditional picture signal generator uses bmp (Bitmap) image as the image source. When testing large-screen and high-resolution liquid crystal displays, the corresponding bmp image data is very large, and the hardware requirements of the signal generator are very high, resulting in the detection process. The picture is not smooth. Under the premise of not increasing the hardware cost, FPGA (based on the hardware structu...

AI Technical Summary

Problems solved by technology

[0003] The traditional picture signal generator uses bmp (Bitmap) image as the image source. When testing large-screen and high-resolution liquid crystal displays, the corresponding bmp image has a large amount of data, which requires high hardware requirements for the signal generator. The picture is not smooth

Under the premise of not increasing the hardware cost, FPGA (based on the hardware structure of FPGA to generate picture data such as figure 1 As shown, it includes a human-computer interaction module, a data analysis module, an image signal generator, a synchronous dynamic random access memory, a synchronous dynamic random access memory controller and an image output encoding module, wherein the data analysis module, an image signal generator, and a synchronous dynamic random access memory , synchronous dynamic random memory controller and image output encoding module are all FPGA internal components) to generate picture data, that is, the scheme of logic picture to replace part of bmp picture, but it is limited to the simplest logic picture (such as horizontal gradient picture, rectangle images with fixed styles such as border images and rectangle fill images), so there is a problem of insufficient detection of liquid crystal displays

At present, it is not possible to use FPGA to generate complex logic screens such as checkerboard screen components of any order

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