Array substrate and display panel
An array substrate and insulating layer technology, applied in optics, instruments, electrical components, etc., can solve the problems of TFT-LCD flicker, unevenness, unstable common electrode voltage, etc., to reduce coupling capacitance, reduce signal interference, The effect of improving quality
Inactive Publication Date: 2014-11-19
BOE TECH GRP CO LTD +1
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Problems solved by technology
[0004] In the above-mentioned array substrate, a coupling capacitance will be generated in the overlapping area of the common electrode line and the data line, as well as the gate line and the data line; taking the common electrode line as an example, the coupling capacitance will pull the Vcom signal to a bias, so that The Vcom signal is unstable and uneven, resulting in unstable voltage on the common electrode, causing TFT-LCD to flicker, afterimage and other defects, affecting the display effect of TFT-LCD
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[0032] Specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be understood that the specific embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.
[0033] Please see figure 1 and figure 2 , figure 1 A schematic diagram of the array substrate provided in the first embodiment of the present invention; figure 2 for figure 1 Schematic diagram of the insulating layer of the array substrate shown. The array substrate 10 includes a glass substrate 18, and a first lead 11 and a second lead 12 intersected on the glass substrate 18, the first lead 11 and the second lead 12 are respectively located in different layers, and an insulating layer is arranged between them 13. The insulating layer 13 includes a first insulating layer 14 located in the area where the first lead 11 and the second lead 12 overlap and a ...
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The invention relates to an array substrate and a display panel, and belongs to the field of liquid crystal display. The array substrate comprises first lead wires and a second lead wire. The first lead wires and the second lead wire are arranged in a crossed manner and are respectively positioned on different layers, an insulating layer is arranged between the first lead wires and the second lead wire and comprises first insulating layers and a second insulating layer, the first insulating layers are positioned in overlapped areas of the first lead wires and the second lead wire, the second insulating layer is positioned on the outsides of the overlapped areas, and the first insulating layers are used for reducing coupling capacitance of the overlapped areas of the first lead wires and the second lead wire. The array substrate and the display panel have the advantages that the coupling capacitance between the first lead wires and the second lead wire can be reduced by the first insulating layers of the array substrate, signal interference between the first lead wires and the second lead wire can be reduced, and accordingly the array substrate and the display panel are beneficial to improving the quality of displayed pictures.
Description
technical field [0001] The present invention relates to the technical field of liquid crystal display, in particular to an array substrate and a display [0002] display panel. Background technique [0003] In a Thin Film Transistor Liquid Crystal Display (hereinafter referred to as TFT-LCD), multiple rows of gate lines and multiple columns of data lines are arranged on the array substrate. Multiple rows of gate lines and multiple columns of data lines are sequentially arranged along the horizontal and vertical directions of the array substrate, respectively. A pixel electrode and a thin film transistor are formed in the area between two adjacent rows of gate lines and two adjacent columns of data lines; wherein, the gate of the thin film transistor is connected to the gate line, the source is connected to the data line, and the drain is connected to the data line. connected to the pixel electrodes. In addition, a common electrode line is provided on the array substrate f...
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IPC IPC(8): G02F1/1362H01L27/12
Inventor 马禹
Owner BOE TECH GRP CO LTD