Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Network-on-chip congestion control method based on dynamic routing table

A network-on-chip, congestion control technology, applied in data exchange networks, digital transmission systems, electrical components, etc., can solve the problems of no dynamic routing table, frequent interactive reading and writing, and increased data processing capacity of routing nodes.

Inactive Publication Date: 2014-12-10
CHANGCHUN UNIV OF SCI & TECH
View PDF2 Cites 16 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In order to solve the problem that the existing congestion avoidance routing algorithm does not have a dynamic routing table that can be updated by itself, it usually performs a real-time query of the congestion status of adjacent nodes and a comparison and screening operation based on the congestion degree values ​​​​of different paths before each decision. Applying the existing congestion avoidance routing algorithm directly to the on-chip network will result in a cumulative increase in the data processing volume of each routing node, and frequent interactive reading and writing between nodes. synchronous accumulation and eventual burst

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Network-on-chip congestion control method based on dynamic routing table
  • Network-on-chip congestion control method based on dynamic routing table
  • Network-on-chip congestion control method based on dynamic routing table

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0083] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0084] Such as Figure 1 to Figure 5 Shown, the present invention is based on the on-chip network congestion control method of dynamic routing table, comprises the steps:

[0085] Step 1: Define the basic X-Y transmission rules:

[0086] On the on-chip network of 2D mesh topology, each routing node on the rectangular array column composed of m×n routing nodes has its own unique coordinates. Let the coordinate value (x, y) of any routing node A, and The coordinate value (p,q) of an arbitrary routing node K, when starting from node A(x,y) and going to node K(p,q), it follows the following basic rules:

[0087] When the abscissa and ordinate of nodes A(x, y) and K(p, q) are different, A(x, y) always ignores the difference on the ordinate, and prefers to make the abscissa difference The adjacent node on the horizontal axis whose absolute value shrinks is used ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a network-on-chip congestion control method based on a dynamic routing table, and belongs to the field of network-on-chip congestion control methods. The method comprises the following steps: defining the self-updating rule of the dynamic routing table; starting and initializing a network-on-chip; resolving an own dynamic routing table; determining non-fault adjacent nodes; and delivering data. According to the method, the dynamic routing table is adopted on the network-on-chip for the first time, the own current optical transmission path of the dynamic routing table can be dynamically updated and decided according to the current states of other nodes, and global awareness can be better shown; and optimal paths with smallest global congestion degrees to any other destination node are always saved in each dynamic routing table, so that convenience is brought to rapid reading and use, and the repeated operation time is shortened greatly. Moreover, through the method, frequent reading and writing operation among routing nodes can be reduced, the data computation amount is reduced, and the operation time is saved, so that network congestion is relieved and limited, and the data processing capability and throughput of the network-on-chip are increased.

Description

technical field [0001] The invention belongs to the field of on-chip network congestion control methods, and in particular relates to an on-chip network congestion control method based on a dynamic routing table. Background technique [0002] Network-on-chip (Noc) is developed from the original system-on-chip (Soc) communication method, and is a brand-new communication mechanism on chip. The original system-on-a-chip is based on the bus transmission method, which is difficult to meet the current network transmission requirements. Therefore, it borrows from the computer network to produce a network-on-chip. The system based on the network-on-chip (NoC) can better adapt to the global asynchronous and local synchronous clock mechanism used in the design of complex multi-core system-on-chip (SoC) in the future, and its performance is significantly better than that of the original bus system. 2D mesh topology network-on-chip is a two-dimensional routing matrix composed of routin...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H04L12/801H04L12/701
Inventor 才华杨勇王博陈玉群曲福恒韩太林窦爽
Owner CHANGCHUN UNIV OF SCI & TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products