Parameter testing method aiming at memory devices of capacitor structure and MOS tube structure
A MOS structure and parameter testing technology, applied in static memory, instruments, etc., can solve the problems of separate programming and erasing operations, inability to automatically extract parameters of capacitor structure devices and four-terminal MOS structure devices, and inability to automate device testing, etc. Achieve the effect of improving test efficiency and speeding up extraction
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[0061] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.
[0062] The present invention provides a parameter testing method for storage devices with capacitor structure and MOS tube structure, wherein the two-terminal storage device is a device with a capacitor structure, and the four-terminal storage device is a device with a MOS tube structure. The method of the main parameters such as the programming speed, erasing speed and endurance parameters of the charge trap memory device (CTM). For devices with capacitive structures, this method can program or erase the device to a specified flat-band voltage (Vfb), and test the variation curve of the flat-band voltage of the device with the programming or erasing voltage and programming or erasing time ( That is, the speed curve); and ...
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