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Method of manufacturing chip package substrate AMD method of manufacturing chip package

A chip packaging and substrate technology, applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., to achieve the effects of improving bonding strength, reducing usage, improving reliability and durability

Active Publication Date: 2014-12-24
LG INNOTEK CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0008] However, the existing electrolytic Ni-Au plating has a quality feature that requires hardness, and as the price of gold rises, the plating cost accounts for more than 30% of the production cost of the existing smart IC chip package

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  • Method of manufacturing chip package substrate AMD method of manufacturing chip package
  • Method of manufacturing chip package substrate AMD method of manufacturing chip package
  • Method of manufacturing chip package substrate AMD method of manufacturing chip package

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Embodiment Construction

[0036] Exemplary embodiments according to the present invention will now be described more fully hereinafter with reference to the accompanying drawings. Exemplary embodiments of this invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these example embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In addition, when it is determined that a specific description about a known related function or construction may not necessarily accompany the main idea of ​​the present invention, the corresponding description is omitted. It should also be understood that the terms used herein should be understood to have the same meaning as they have in the context of this specification. Throughout the specification, the same reference numerals refer to the same elements with respect to elements per...

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Abstract

Provided are a chip package substrate and a method of manufacturing a chip package, the chip package substrate, including: an insulating layer on which via holes are formed; a circuit pattern layer formed on one surface of the insulating layer; a plated layer formed on one surface of the circuit pattern layer, wherein the plated layer comprises an Ni layer formed on the one surface of the circuit pattern layer, an alloy layer formed on the Ni layer, and an Au layer formed on the alloy layer. According to the present invention, in the plated layer, a thickness of the Au layer having a high material cost is reduced. Thus, it is advantageous that the amount used of Au is reduced, thereby enabling the total production cost of a product to be reduced.

Description

technical field [0001] The present invention relates to the technical field of chip packaging, and more particularly, to the technology of manufacturing chip packaging substrates. Background technique [0002] Technologies involving packaging of semiconductors or optical devices have been steadily developed to meet demands for high densification, miniaturization, and high performance. However, because this technology has lagged relatively behind the technology used to manufacture semiconductors, attempts have recently been made to address the demands for high performance, miniaturization, and high densification by developing technology involving packaging. [0003] Regarding the semiconductor / optical device package, a silicon chip or a light emitting diode (LED) chip, a smart IC chip, etc. are bonded on a substrate using a wire bonding method or a lead on chip (LOC) bonding method. [0004] figure 1 A cross-sectional view of a generic smart IC chip package is shown. [00...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/12
CPCH01L23/3121H01L23/4985H01L21/4846H01L2224/48091H01L2224/45139H01L2924/181H01L2924/12042H01L2924/12041H01L2924/00014H01L2924/00011H01L2924/00H01L2224/45099H01L2924/00012H01L2924/01049H01L23/12H01L24/05H01L24/29H01L2224/04042H01L2224/05023H01L2224/05025H01L2224/05083H01L2224/05144H01L2224/05155H01L2924/01005H01L2924/01015H01L2924/14
Inventor 金弘壹
Owner LG INNOTEK CO LTD
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