Preparation process of image sensor

Abstract

The invention relates to the field of semiconductors, in particular to a preparation process of an image sensor. The preparation process comprises the following steps of S1, providing a semiconductor structure, wherein the top part of the semiconductor structure is provided with a groove, a leading wire is formed in the groove, and a first dielectric layer covers the top part of the semiconductor structure and the exposing surface of the groove; S2, depositing a second dielectric layer, covering the second dielectric layer on the first dielectric layer and the upper surface of the leading wire, and filling the groove; S3, performing the reverse etching to reduce the thickness of the second dielectric layer, and forming a convex structure at the surface of the second dielectric layer above the groove; S4, flattening the second dielectric layer, and utilizing the convex structure to improve the flatness of the ground surface of the second dielectric layer.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to an image sensor preparation process. Background technique [0002] CMOS image sensor belongs to optoelectronic components. CMOS image sensor has gradually become the mainstream of image sensor because its manufacturing process is compatible with the existing integrated circuit manufacturing process, and its performance has many advantages over the original charge-coupled device (CCD) image sensor. . The CMOS image sensor can integrate the driving circuit and the pixel together, which simplifies the hardware design and reduces the power consumption of the system at the same time. The CMOS image sensor can take out the electrical signal while collecting the optical signal, and can also process the image information in real time, which is faster than the CCD image sensor. At the same time, the CMOS image sensor also has the advantages of cheap price, large bandwidth, anti-blurring, an...

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Problems solved by technology

However, those skilled in the art find that after the second dielectric layer 5 is planarized, the thickness of the remaining second dielectric layer 5 at different positions varies greatly

This is when depositing the second dielectric layer 5, the dielectric layer at the top of the groove will be correspondingly formed with a groove, so when grinding, the grinding rate of the second dielectric layer 5 near the groove will generally be greater than Grinding rate at other positions, which is prone to butterfly defects (Disshing)6

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