A kind of method of making finfet semiconductor device

Abstract

The invention relates to a method for manufacturing a FinFET semiconductor device. The method includes the following steps: providing a semiconductor substrate; forming a hard mask layer with a shallow groove pattern on the semiconductor substrate; etching the semiconductor substrate so as to form shallow grooves and fins between the shallow grooves; depositing a first oxide layer on the semiconductor substrate so as to fill the shallow grooves partly; depositing a groove stop layer on the first oxide layer; depositing a second oxide layer on the groove stop layer; executing a first flattening step and stopping at the groove stop layer at the tops of the fins; executing a second flattening step and stopping at the hard mask layer; and back-etching the second oxide layer in the shallow grooves so as to expose the groove stop layer in the shallow grooves. According to the method, the technology change of back-etching of the oxide layers can be well controlled.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, and in particular, the invention relates to a method for manufacturing a FinFET. Background technique [0002] Integrated circuits (ICs) have grown from a handful of interconnected devices fabricated on a single silicon chip to millions of devices. Current ICs offer performance and complexity far beyond what was originally imagined. To achieve improvements in complexity and circuit density (i.e., the number of devices that can be packed into a given chip area), the size of the smallest device feature, also known as device "geometry," has become smaller with each IC generation. Small. Semiconductor devices are now fabricated with features that span less than a quarter of a micron. [0003] With the continuous development of semiconductor technology, the improvement of integrated circuit performance is mainly achieved by continuously shrinking the size of integrated circuit devices to inc...

AI Technical Summary

Problems solved by technology

[0008] The manufacturing process of the existing bulk FinFET is relatively complicated, and the etching of the fin (such as Figure 1C ) and STI oxide formation recess (recess) (eg Figure 1F ) process, the existing bulk FinFET manufacturing process is difficult to control the change of polysilicon fin height

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