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Verifying partial good voltage island structures

A technology of integrated circuits and logic blocks, applied in electrical digital data processing, CAD circuit design, digital data processing components, etc., can solve the problems of increasing chip design time and complexity, and unreasonable time consumption

Inactive Publication Date: 2015-03-18
GLOBALFOUNDRIES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Integrated circuits that combine voltage islands and redundant structures increase the time and complexity of chip design
Furthermore, since verification of IC designs can triple the effort used in designing ICs, design verification of IC chips with redundant voltage island structures can result in an unrealistically time-consuming amount of time.

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  • Verifying partial good voltage island structures
  • Verifying partial good voltage island structures
  • Verifying partial good voltage island structures

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Embodiment Construction

[0017] The present invention relates to integrated circuits, and more particularly to the design and verification of integrated circuits including redundant logic blocks. According to some aspects of the present invention, methods and related structures for integrated circuits are provided that allow control of logic segmentation verification for redundant logic blocks. That is, the work of verification is divided into items. Logic functional verification (leveraging normal functional logic simulation / coverage techniques) verifies basic building blocks (eg individual logic blocks). Structural verification verifies that the building blocks are correctly wired together at the chip level. Furthermore, aspects of the invention allow chip-level verification of redundant logic blocks using only one representative permutation, wherein one or more redundant logic blocks are disabled according to a partially good chip design. Accordingly, segment verification according to aspects of ...

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Abstract

Structures, methods, and systems for designing and verifying integrated circuits including redundant logic blocks are provided. An integrated circuit includes selection logic and selectable logic blocks that are individually controllable by the selection logic. The selectable logic blocks include respective instances of a redundant logic block, and respective instances of an interface logic block that selectively disable the redundant logic blocks in the integrated circuit.

Description

technical field [0001] The present invention relates to integrated circuits, and more particularly to the design and verification of integrated circuits that include redundant logic blocks. Background technique [0002] Integrated circuit ("IC") designs have become more complex over time. Power consumption and yield limit the production of complex integrated circuit designs. To address power consumption constraints, some integrated circuit designs use voltage islands. Voltage islands are individually controllable power regions. By placing components of the integrated circuit in different voltage islands, the integrated circuit can selectively operate components in one or more voltage islands at lower voltages and / or shut down components when their functionality is not required. [0003] In an effort to address yield issues, some integrated circuit designs are used as partially good chips. A partially good chip is an integrated circuit that includes one or more elements t...

Claims

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Application Information

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IPC IPC(8): G06F17/50
CPCG06F2217/78H03K19/00392G06F1/3287G06F17/505G06F2217/72G06F30/327G06F2117/06G06F2119/06
Inventor K·W·戈满S·F·奥克兰德M·R·奥埃莱特S·J·尤里施
Owner GLOBALFOUNDRIES INC