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Flat sample manufacturing method capable of improving quality of transmission electron microscope images

A technology for transmission electron microscopy and image quality, which is used in the preparation of test samples, material analysis using measurement of secondary emissions, etc. It can solve problems such as interference, difficulty in clearly determining defects, and achieve the effect of improving efficiency.

Inactive Publication Date: 2015-04-22
WUHAN XINXIN SEMICON MFG CO LTD
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  • Abstract
  • Description
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  • Application Information

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Problems solved by technology

[0004] At present, FIB (Focused Ion Beam, FIB) technology is used to detect defects in the image obtained by transmitting the sample, but because the sample includes some non-defective layers in addition to the defective part, and these non-defective layers will be superimposed in the transmission electron microscope Interfering with the image of the defective part, which makes it difficult for workers to clearly determine the existence of the defect

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  • Flat sample manufacturing method capable of improving quality of transmission electron microscope images
  • Flat sample manufacturing method capable of improving quality of transmission electron microscope images
  • Flat sample manufacturing method capable of improving quality of transmission electron microscope images

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Embodiment Construction

[0034] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.

[0035] In view of the above existing problems, the present invention discloses a planar sample preparation method for improving the image quality of the transmission electron microscope to overcome the interference of the defect image of the sample to be tested in the non-defect layer in the transmission electron microscope of the semiconductor device in the prior art.

[0036] Such as Figure 5 As shown, this embodiment relates to a method for preparing a planar sample to improve the image quality of a transmission electron microscope, which specifically includes the following steps:

[0037] Step 1, providing a sample to be tested due to the leakage between the bit lines caused by the flake residual polysilicon, first locate the physical position of the failure point by electrical testing; whe...

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Abstract

The invention relates to the technical field of manufacturing of semiconductors, in particular to a flat sample manufacturing method capable of improving quality of transmission electron microscope images. Firstly, through an electrical performance test method, the positions of failure points are obtained, and according to the positions of the failure points, a first opening is formed in the front face of a sample to be tested, and a second opening is formed in the back face of the sample to be tested; the sample to be tested continues to be placed in a boiling choline matching solution to be kept for 5 min to 10 min, so that a silicon substrate at the bottom of the second opening is thoroughly removed; then, through the etching technology, an insulation layer and a second polycrystalline silicon layer below the first opening are removed; finally, the transmission electron microscope images are utilized for analyzing the failure points. Through the method, the polycrystalline silicon transmission electron microscope images in a failure area are not interfered by a non-failure area, the even and clear transmission electron microscope images of the sample to be tested are obtained, and therefore defects are found more easily, and the defect analysis efficiency of a device is further improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a plane sample preparation method for improving the image quality of a transmission electron microscope. Background technique [0002] With the development of electronic equipment, semiconductor devices are developing in the direction of multi-function and high integration, and the requirements for the performance of semiconductor devices are getting higher and higher. [0003] Leakage between bit lines is an important parameter and index in the performance of semiconductor devices. This type of leakage is caused by polysilicon remaining between bit lines due to some reasons in the bit line production process. That is, because of the irregular shape of the sheet, some of the sheet polysilicon remains on the sidewall of the space surrounded by two adjacent bit lines and the isolation layer, and the thickness of the sheet structure is about 10-20nm, and the heig...

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Application Information

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IPC IPC(8): G01N1/28G01N23/22
Inventor 刘君芳仝金雨李桂花郭伟李品欢
Owner WUHAN XINXIN SEMICON MFG CO LTD