A calculation method for tate bilinear pairing against error attack in ternary field

A bilinear pairing and error attack technology, applied in the field of public key cryptography, can solve problems such as low computing efficiency and inability to completely resist error attacks, and achieve the effects of fast and secure computing, less time cost, and resistance to error attacks

Active Publication Date: 2018-06-05
SHANGHAI HUAHONG INTEGRATED CIRCUIT
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AI Technical Summary

Problems solved by technology

It can be seen that the defense method of blinding the number of cycles is completely ineffective against this type of attack
[0063] In addition, this defense method is not only unable to completely resist wrong attacks, but also has very low computational efficiency.

Method used

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  • A calculation method for tate bilinear pairing against error attack in ternary field
  • A calculation method for tate bilinear pairing against error attack in ternary field
  • A calculation method for tate bilinear pairing against error attack in ternary field

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Embodiment Construction

[0078] The following describes the principle of the Tate bilinear pair calculation method against error attacks in the ternary domain. Firstly, the proof of the correctness of the operation results of the Tate bilinear pairing calculation method against error attacks in the ternary field is given when the number of cycles is correct:

[0079] Calculation of Rational Function f by Tate Bilinear Pairs in Primitive Ternary Field P The formula for (ψ(Q)) is as follows:

[0080] f 1 =f P (ψ(Q))=(…(((A 1 ) 3 A 2 ) 3 A 3 ) 3 ...) 3 A m

[0081] Computation of Rational Function f by Tate Bilinear Pairs Against Mistake Attacks in Ternary Domain P The formula for (ψ(Q)) is as follows:

[0082]

[0083] When the number of cycles m has not been changed, after m rounds of operations, we can get Due to finite fields The element R in satisfies the nature of the available thus deduced Therefore after the final modular exponentiation Afterwards, the factor of the ra...

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Abstract

The invention discloses a ternary-domain anti-error-attack Tate bilinear pairing computation method. The method comprises steps as follows: an original Tate bilinear pairing computation process is modified, and factors of random numbers are added to resist error attacks; the factors of the random numbers cannot affect a final result when a ternary-domain Tate bilinear pairing is not attacked; a result acquired by an attacker finally can be mixed with the factors of the random numbers when computation errors appear due to the fact that the ternary-domain Tate bilinear pairing is attacked. The attacker cannot know concrete values of the random numbers, so that a secret key cannot be calculated with effective information due to the fact that the factors of the random numbers cannot be removed from the final result. Thus, with the adoption of the method, the error attacks on the ternary-domain Tate bilinear pairing can be effectively resisted.

Description

technical field [0001] The invention relates to a public key cryptography application method, in particular to a ternary domain anti-error attack Tate bilinear pairing calculation method. Background technique [0002] In recent years, bilinear pairings have been widely studied and applied due to their bilinear, non-degenerate and computable properties. The cryptographic system based on bilinear pairing has been paid attention to and researched due to its unique advantages, and has been gradually applied in the industry. Many international standard organizations are also developing standards for bilinear pairing, such as ISO / IEC 14888-3, IEEE P1363.3, and so on. Researchers have proposed many cryptographic schemes based on bilinear pairings, such as identity-based encryption schemes, short signature schemes, and identity-based authenticated key agreement schemes. agreement schemes) and so on. [0003] There are two polynomial-time algorithms for computing bilinear pairs, W...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L9/30
Inventor 柴佳晶王晓静顾海华
Owner SHANGHAI HUAHONG INTEGRATED CIRCUIT
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