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Methods for Detecting Etch Loading Effects

A technology of load effect and etching load, which is applied in the direction of semiconductor/solid-state device testing/measurement, etc., can solve the problems of inability to give differences, single detection of equipment, and inability to measure the film thickness of dense pattern areas, etc., to achieve maintenance stability Effect

Active Publication Date: 2018-04-06
SHANGHAI HUALI MICROELECTRONICS CORP
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AI Technical Summary

Problems solved by technology

However, these devices can only detect the results of a specific structure
For example, CDSEM can only measure the key dimensions of a certain structure, and the film thickness machine can only measure the film thickness of the large etching area after etching, but cannot measure the film thickness of the dense pattern area after etching
Therefore, none of these methods can give the difference in etching due to different pattern densities
[0005] In addition, for the loading effect, the existing detection method is only confirmed by comparing the results of TEM (transmission electron microscope) and SEM (scanning electron microscope) slices with different structures, and cannot carry out real-time and effective monitoring
Especially when there is an abnormality in the etching machine or process and it is necessary to confirm the load effect during the etching process, it is a time-consuming, laborious and costly process to obtain the result of slicing

Method used

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  • Methods for Detecting Etch Loading Effects
  • Methods for Detecting Etch Loading Effects
  • Methods for Detecting Etch Loading Effects

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Embodiment Construction

[0026] see figure 1 The method for detecting the etching load effect of the present embodiment is used to detect the load effect of each parameter in the etching process, which includes the following steps:

[0027] Define the measurement structure in the silicon wafer, the measurement structure includes dense trench structure, sparse trench structure, fully etched area and completely unetched area;

[0028] Etching the silicon wafer to form dense trench structure, sparse trench structure, fully etched area and completely unetched area;

[0029] The measurement parameters of each measurement structure after etching are measured by an optical line width measuring instrument, and the load effect of etching is calculated.

[0030] The measured parameters in this embodiment include critical dimensions, film thickness, and trench sidewall angle, and the calculated etching load effects include film thickness load effects, critical dimension load effects, and trench sidewall angle l...

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Abstract

The invention discloses a method for detecting etching load effects. Such measurement structures as a dense groove structure, a sparse groove structure, a completely etched region and a completely non-etched region are pre-defined, and then the measurement parameters, such as critical size and membrane thickness, of each measurement structure are measured after etching by use of an optical line width measurer, and simple data processing is performed to obtain the load effects of the measurement parameters in the etching process. The method is capable of monitoring the change of the load effects of different products or etching machines in the etching process in real time and quickly detecting the abnormal conditions of the etching processes or machines; as a result, the stability of the etching processes can be maintained favorably; meanwhile, in the new product off-line or new process development process, the applicability of the etching process also can be quickly confirmed.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuit manufacturing, in particular to a method for detecting load effects in an etching process. Background technique [0002] With the development of integrated circuit technology and the continuous reduction of key dimensions, the technology of scaling down semiconductor devices is also constantly developing, especially as one of the key technologies for scaling down semiconductor devices, thin-film preparation technology is getting more and more attention from process manufacturers; The proportional reduction of semiconductor devices is not only the reduction of traditional device structures, but also the introduction of new materials and device structures at each integrated circuit technology node. [0003] Etching is a very important step in the semiconductor manufacturing process, and etching determines the critical dimension (CD) of the final structure. Due to the differ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/66
Inventor 陈路王晋曾林华任昱吕煜坤朱俊张旭昇
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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