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Synchronous multi-home peer-to-peer bus communication system

A bus communication, multi-master peer-to-peer technology, applied in the transmission system, bus network, synchronization device, etc., can solve the problems of massive data conflicts, important data cannot be processed in time, and achieve good results

Active Publication Date: 2015-06-17
AVIC NO 631 RES INST
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Problems solved by technology

[0004] In order to solve the technical problems existing in the background technology, the present invention proposes a synchronous multi-master peer-to-peer bus communication system, which solves the problem that important data cannot be processed in time due to conflicts when massive data is transmitted on the multi-master peer-to-peer bus system question

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  • Synchronous multi-home peer-to-peer bus communication system

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Embodiment Construction

[0023] see figure 1 , this patent takes the typical multi-master peer-to-peer bus CAN bus as an example, and proposes a design method for synchronous CAN bus, including two parts: synchronous signal interface circuit design and software / logic design. The main idea is based on the number of devices in the system , the size of the sent data and the priority of the device, etc., with the rising edge of the synchronization signal as the starting time T 0 , assign the start time T of sending data to each device 0 +T i (i is the device number) and the length of time L i , by logically ensuring that each device is in (T 0 +T i )—(T 0 +T i +L i ) to send data to the bus within the time period, and the device receives data without time limit.

[0024] Synchronization signal interface circuit design: The synchronization signal adopts the form of differential signal, and can be configured as input or output mode by writing 1 or 0 to the internal register of D1 chip FPGA. The syn...

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Abstract

The invention provides a synchronous multi-home peer-to-peer bus communication system which comprises a synchronizing signal interface circuit, a synchronizing signal configuration module and a data sending control module. The synchronizing signal interface circuit adopts a difference level switch chip D2 with an enable pin, and synchronizing signals enter a D1 through the D2 and an optocoupler V2 in an input mode; in an output mode, the signals are output from the D1 and then output through an optocoupler V1A and the D2; input enable signals and output enable signals of the D2 are connected together and then connected to the D1 through an optocoupler V1B; the synchronizing signal configuration module is divided into a switch type input mode and a switch type output mode and connected with the chip D1; the data sending control module sends the data start time and time length information to the chip D1 through an interface of the chip D1. According to the synchronous multi-home peer-to-peer bus communication system, the problem that important data cannot be processed in time due to collision when the mass data are transmitted in a multi-home peer-to-peer bus system is solved.

Description

technical field [0001] The invention belongs to the field of electronic circuits, in particular to a synchronous multi-master peer-to-peer bus communication system. Background technique [0002] Multi-master peer-to-peer buses usually have the characteristics of high speed and high reliability. Any node on the network can actively send messages, and non-destructive bus arbitration technology is used to avoid bus data conflicts. It has point-to-point, point-to-multipoint and Various transmission methods such as global broadcasting. [0003] Based on the above advantages, the multi-master peer-to-peer bus communication system is widely used in vehicle systems. With the continuous improvement of the system complexity and the massive growth of communication data, the frequency of data conflicts on the multi-master peer-to-peer bus system has greatly increased, resulting in the inability to obtain important information. Deal with it in a timely manner. Contents of the inventio...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/40H04L7/00
Inventor 景德胜缑丽敏刘永强梁争争许少尉王国东刘硕谭志宏
Owner AVIC NO 631 RES INST