JPEG_LS rule coding hardware achieving method based on scanning sequence changing

A scanning sequence, hardware-implemented technology, applied in electrical components, digital video signal modification, image communication, etc., can solve problems such as critical path optimization of reconstructed values ​​that cannot be solved, and achieve the effect of improving processing speed

Inactive Publication Date: 2015-06-17
北京润光泰力科技发展有限公司
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Problems solved by technology

However, there are two problems with this method. One is that the difference between the reconstructed value and the real value is less than or equal to twice the NEAR value, that is, under the same NEAR value, the error is expanded to twice the standard algorithm; The key path of reconstruction val

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  • JPEG_LS rule coding hardware achieving method based on scanning sequence changing
  • JPEG_LS rule coding hardware achieving method based on scanning sequence changing
  • JPEG_LS rule coding hardware achieving method based on scanning sequence changing

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[0023] In order to further illustrate the technical means and effects adopted by the present invention to achieve the predetermined purpose of the invention, the following in conjunction with the accompanying drawings and preferred embodiments, the specific implementation of the JPEG_LS rule encoding hardware implementation method based on the scanning sequence change proposed by the present invention , steps, structure, features and their effects are described in detail.

[0024] refer to image 3 Shown, is the schematic flow chart of the JPEG_LS rule coding hardware implementation method based on the scan order change of the present invention, the present invention is based on the scan order change The JPEG_LS rule coding hardware implementation method includes a source image scanning step, a quantization error generation and a reconstruction value generation step , Columbus encoding step, code stream output step. The source image scanning step is realized by 6-line buffer,...

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Abstract

The invention relates to a JPEG_LS rule coding hardware achieving method based on scanning sequence changing. The method comprises the step of source image scanning, the step of quantization error generating and reconstruction value generating, the step of Columbus coding and the step of code stream outputting. According to the source image scanning, a source image is cached with six lines as a basic unit, a page turning RAM is used for achieving, every six lines serve as one page, writing and coding are alternately carried out on the current page and the next page, and data in the six lines in the cache are alternately coded from top to bottom and from left to right during coding; the quantization error generating and reconstruction value generating step is finished through a six-level assembly line. According to the JPEG_LS rule coding hardware achieving method based on scanning sequence changing, the processing speed is increased to six times of the processing speed of a standard JPEG_LS rule coding hardware achieving method, and a high-definition video can be easily compressed and processed frame by frame on a low-end and cheap FPGA.

Description

technical field [0001] The invention relates to a hardware implementation method of the JPEG_LS standard in the field of image compression technology, in particular to a hardware implementation method of JPEG_LS rule encoding based on scanning order change. Background technique [0002] JPEG_LS is a near-lossless image compression standard formulated by ISO / ITU, which is widely used in the field of image compression with low compression ratio. figure 1 As shown, it is a schematic diagram of the existing JPEG_LS standard scanning sequence, wherein 11 represents the data of the first row and the first column, and 6100 represents the data of the sixth row and the 100th column. figure 1 The gray grid line part indicates that when encoding the data 35 in the 3rd row and the 5th column, it is necessary to use the 2nd row and 4th column data 24, the 2nd row and 5th column data 25, and the 2nd row and 6th column data 26. The reconstructed value and the reconstructed value of the da...

Claims

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Application Information

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IPC IPC(8): H04N19/124
Inventor 于建华
Owner 北京润光泰力科技发展有限公司
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