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JFET (junction field-effect transistor) simulation method with size scalability

A simulation method and scalability technology, applied in the field of JFET simulation, can solve the problem that the model does not have size scalability

Active Publication Date: 2015-07-01
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

At present, each simulation software provides an industry-standard JFET device model for circuit design simulation, but the model does not have size scalability. One model can only describe the characteristics of a single JFET device size, and JFET devices of different sizes need to have different parameters. SPICE model for description

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  • JFET (junction field-effect transistor) simulation method with size scalability
  • JFET (junction field-effect transistor) simulation method with size scalability

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Embodiment Construction

[0028] The size-expandable JFET simulation method described in the invention can accurately simulate the device characteristics of the JFET along with the variation of W and L on the size of the JFET.

[0029] The JFET device dimensions W and L defined above are the design dimensions on the mask. Due to process changes, the JFET dimensions actually formed on the silicon wafer are different from the design values. Therefore, the JFET effective channel length Leff and effective channel width Weff is represented by the following formulas (1), (2):

[0030] Leff=L-DL (1)

[0031] Weff=W-DW (2)

[0032] Among them, DL represents the influence of process variation on the channel length of JFET; DW represents the influence of process variation on the channel width of JFET.

[0033] Calculated by formulas (1) and (2), the effective area of ​​JFET can be obtained as:

[0034] AREAeff=(W-DW)*(L-DL)*PF (3)

[0035] Among them, AREAeff represents the effective area of ​​JFET; PF repre...

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Abstract

The invention discloses a JFET (junction field-effect transistor) simulation method with size scalability. A convention JFET simulation method can only describe characteristics of single-sized JFETs, and JFETs different in size need to be described with different SPICE simulation. On the basis of JFET SPICE of the industry standard, part of simulation parameters is rewritten, so that the parameters associated with change in size are acquired, and scalability in simulation of the JFETs with change in size is realized.

Description

technical field [0001] The invention relates to the field of integrated circuit design simulation, in particular to a JFET simulation method with scalability in size. Background technique [0002] JFET (Junction Field Effect Transistor) is a common device type in field effect devices. figure 1 It is a cross-sectional view of a conventional vertical N-type JFET, where N+ is used as the source and drain of the JFET at both ends of the N-type well, and the P-type well is used as the gate of the JFET. The P-type well can also be replaced by P+. The size of the flow direction is defined as the JFET channel length L, and the size of the P-type well perpendicular to the current flow direction is defined as the JFET channel width W. The most common one is to obtain a PN diffusion junction through process injection, and to deplete the PN junction through an applied voltage to form a current pinch. Due to the unique switching characteristics of this type of device, it is often used i...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 武洁
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP