Pseudo gate removing method

A dummy gate and dry cleaning technology, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve problems such as damage and poor insulation, and achieve improved performance, good shape, and repair of titanium nitride capping layer Effect

Active Publication Date: 2015-07-01
SEMICON MFG INT (SHANGHAI) CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, if figure 2 As shown, when the first dummy gate 12A with a smaller size is etched clean, the dummy gate of the second dummy gate 12B with a larger size has already been removed to expose the second gat

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[0029] In the existing method for removing the dummy gate, the dummy gate is usually removed by dry etching. However, the removal rate of the dummy gate of different sizes is different when the dummy gate is removed by dry etching. The removal rate of the dummy gate is faster, and the removal rate of the dummy gate with a smaller size is slower. When the dummy gate with a smaller size is removed cleanly, the gate dielectric layer under the dummy gate with a larger size is easily damaged due to premature exposure. After the metal gate is filled in the opening formed by removing the dummy gate, the metal gate The insulation between the substrate and the substrate is poor. When the transistor is an NMOS, damage to the gate dielectric layer will seriously affect the Time Dependent Dielectric Breakdown (TDDB) of the NMOS.

[0030] Analyze the process of removing the dummy gates. For dummy gates with larger dimensions, the openings formed on the surface of the dummy gates at the beginn...

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Abstract

The invention provides a pseudo gate removing method. In a pseudo gate removing step, pulse plasma etching is adopted to conduct first etching on a pseudo gate, and then second etching is conducted on the residual pseudo gate. When the pulse plasma etching is adopted to conduct the first etching on the pseudo gate, an etching machine outputs source power in a pulse mode to etch the pseudo gate in an intermittent mode, source power output time and vacant time are both short, a polymer and solid produced in etching are discharged out of an opening formed through etching within the interval time of source power vacancy, the pulse plasma etching rates adopted for pseudo gates different in size are equal under the condition that no polymer blockage exists, a gate electrode dielectric layer with large-sized pseudo gates can be kept in a good shape when first etching is completed, and further the performance of the gate electrode dielectric layer can be improved.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for removing dummy gates. Background technique [0002] In the high-K dielectric / metal gate engineering of transistors, after high-temperature annealing for ion activation, the dummy gate (such as polysilicon gate) needs to be removed, and then the metal gate is filled to form a high-K dielectric / metal gate structure . [0003] refer to figure 1 and figure 2 , shows a method for removing dummy gates in the prior art. Such as figure 1 As shown in the first dummy gate structure 20A and the second dummy gate structure 20B in the substrate 01, the first dummy gate structure 20A includes the first dummy gate 12A and the first gate dielectric layer at the bottom of the first dummy gate 12A 11A, the first spacer 13A on the side wall of the first dummy gate 12A; the second dummy gate structure 20B includes the second dummy gate 12B, the second gate dielectric layer 11B at the...

Claims

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Application Information

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IPC IPC(8): H01L21/28H01L21/3213
CPCH01L21/28008H01L21/32136H01L29/66545
Inventor 张海洋尚飞
Owner SEMICON MFG INT (SHANGHAI) CORP
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