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A/d converter circuit and semiconductor integrated circuit

A converter circuit and converter technology, applied in the direction of analog-to-digital converter, analog/digital conversion, code conversion, etc., can solve the problems of increased design man-hours, large current consumption, large surface area, etc., and achieve the effect of preventing the increase of surface area

Inactive Publication Date: 2015-07-01
RENESAS ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0027] The A / D converter circuit in Non-Patent Document 4 needs to apply a mechanism of offset, which also causes problems of larger surface area and larger current consumption, and increased design man-hours

Method used

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  • A/d converter circuit and semiconductor integrated circuit
  • A/d converter circuit and semiconductor integrated circuit
  • A/d converter circuit and semiconductor integrated circuit

Examples

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Effect test

no. 1 example

[0070] (Structure of Analog / Digital (A / D) Converter Circuit)

[0071] Figure 1A and 1B are an outline diagram and a conversion timing diagram of the A / D converter circuit 1 based on the first embodiment.

[0072] In this example, in the reference Figure 1A An A / D converter circuit 1 for converting an analog input signal into a numerical value is described at the same time.

[0073] The A / D converter circuit 1 includes an A / D converter unit (ADC) 10 , a search vector generator unit 20 , a digital corrector unit 30 , an error signal generator unit 40 and a coefficient search unit 50 .

[0074] The A / D converter unit 10 converts an analog input signal into a digital value representing an AD conversion result. The search vector generator unit 20 is based on each bit D of the digital value output from the A / D converter unit 10 i (k) Each bit of D i (k) approximation to compute the search vector δ i (k) . In this example, the search vector generator unit 20 based on each ...

no. 2 example

[0284] In the second embodiment, an A / D converter circuit capable of high-speed processing for performing time interleaving operation is described.

[0285] (when there are 2 time interleaves)

[0286] Figure 17A and Figure 17B are an outline diagram and a conversion timing diagram for describing the structure of the A / D converter circuit 2 based on the second embodiment.

[0287] Such as Figure 17A The A / D converter circuit 2 based on the second embodiment shown in includes A / D converter units (ADC) 10-1, 10-2, search vector generator units 20-1, 20-2, digital correction generator units 30-1, 30-2, error signal generator units 40-1, 40-2, coefficient search units 50-1, 50-2, and an output selector switch 75.

[0288] The A / D converter units 10-1, 10-2 convert an analog input signal into a digital value as an AD conversion result.

[0289] Search vector generator units 20-1, 20-2 are based on each D which is a digital value output from A / D converter units 10-1, 10-2, r...

no. 3 example

[0424] In the A / D converter circuits of the first and second embodiments, the structure capable of background operation was described, but the signal waveform of the analog input signal input to the A / D converter unit 10 may not always be within the weight coefficient Normal operation during search processing.

[0425] For example, if the analog input signal does not change, the conversion result from the A / D converter circuit is fixed, so the error signal is always zero. At this time, there is no rewriting of the weight coefficients, so the search process for the weight coefficients does not work either. In other words, this task will not operate correctly.

[0426] Therefore, a case is described in which a signal independent of an analog input signal is input in advance to perform search processing for weight coefficients and perform a foreground operation to search for weight coefficients.

[0427] Figure 26A and Figure 26B is a diagram for describing signals input to...

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Abstract

An analog-to-digital converter circuit having a simple design and capable of preventing an increase in surface area and other problems. An analog-to-digital converter circuit for converting an analog input signal to a digital quantity includes an analog-to-digital converter unit that converts analog input signals to pre-correction digital values, and a corrector unit that digitally corrects the pre-connection digital values output from the analog-to-digital converter unit. The corrector unit includes a weighting coefficient multiplier unit that outputs a post-correction digital value obtained by multiplying the weighting coefficients provided for each bit by each bit of the pre-correction digital value output from the A / D converter unit and summing them, and a weighting coefficient search unit that searches for weighting coefficients so as to minimize an error signal generated based on the post-correction digital value and an approximate value for the post-correction digital value.

Description

[0001] Cross References to Related Applications [0002] The disclosure of Japanese Patent Application No. 2013-272727 filed on December 27, 2013, including specification, drawings and abstract, is hereby incorporated by reference in its entirety. technical field [0003] The present invention relates to an analog / digital (A / D) converter circuit for converting an analog quantity into a numerical value. Background technique [0004] A sequential comparison ADC (Analog to Digital Converter) is a type of A / D (Analog / Digital) conversion system. With the help of CMOS process miniaturization, high-speed and high-accuracy AD (analog-to-digital) conversion has become possible, so that sequential comparison ADCs are now used in a wide range of fields from traditional sensor applications to wireless communications and more. In these areas, sequential comparison ADCs performing non-binary conversions have proven to be particularly resistant (robust) to undesired effects such as device...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/12
CPCH03M1/002H03M1/447H03M1/0617H03M1/0634H03M1/1009H03M1/12H03M1/1215H03M1/1225
Inventor 木村圭助奥田裕一中根秀夫山本崇也
Owner RENESAS ELECTRONICS CORP