Multi-picture separator capable of playing high-definition and standard-definition videos based on FPGA and multi-picture separation method based on FPGA

Abstract

The present invention provides a multi-picture separator capable of playing high-definition and standard-definition videos based on a FPGA (Field-Programmable Gate Array). The multi-picture separator comprises a plurality of high-speed serial interface receiving modules, a plurality of auxiliary data extraction and display modules and a plurality of video scaling modules, wherein the high-speed serial interface receiving modules, the auxiliary data extraction and display modules and the video scaling modules are mutually matched to form multiple groups for respectively processing multi-path SDI (Serial Digital Interface) video signals; the plurality of video scaling modules are connected with a video splicing module; and the video splicing module is connected with a storage module, a signal module required by an HDMI (High-Definition Multimedia Interface) sending chip, and a high-speed serial interface sending module. The present invention also provides a multi-picture separation method based on the FPGA. In the present invention, the FPGA is selected as a main chip; one external memory is adopted; a cubic interpolation method is used for scaling a video; and meanwhile, the time during which a multi-path video is written into the memory is controlled so that the separator only needs one memory without the need of using a charged IP kernel, thereby greatly reducing the cost.

Description

technical field [0001] The invention relates to a broadcast-level multi-picture splitter, in particular to an FPGA-based high-definition and standard-definition mixed broadcast multi-picture splitter with an auxiliary data extraction function and a splitting method. Background technique [0002] In recent years, in the radio and television market, high-definition video is gradually replacing standard-definition video. However, due to the limitations of equipment and other reasons, high-definition and standard-definition will coexist for a long time in the future. The solution of FPGA+DSP uses DSP to scale and process each channel of video, and then sends the video to the FPGA so that the video can achieve the purpose of splitting the screen output, but such a combination of multiple chips may lead to a decrease in system reliability. The multi-chip solution will increase the area of ​​the PCB printed circuit board, resulting in disadvantages such as large product size, poor ...

AI Technical Summary

Problems solved by technology

[0004] In view of the problems of system instability and high cost in existing solutions, the present invention proposes an FPGA-based high-definition and standard-definition mixed broadcast multi-screen splitter, which is convenient to implement, more stable in system, and lower in cost. Low

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